Lines Matching refs:MSG_PORT_SOC_UNIT
120 msg_port_alt_setbits(MSG_PORT_SOC_UNIT, PCIE_CFG, PCIE_PHY_LANE_RST); in quark_pcie_early_init()
125 msg_port_alt_setbits(MSG_PORT_SOC_UNIT, PCIE_CFG, in quark_pcie_early_init()
131 msg_port_alt_setbits(MSG_PORT_SOC_UNIT, PCIE_CFG, PCIE_CTLR_SB_RST); in quark_pcie_early_init()
139 msg_port_alt_setbits(MSG_PORT_SOC_UNIT, PCIE_CFG, PCIE_CTLR_PRI_RST); in quark_pcie_early_init()
177 msg_port_alt_clrsetbits(MSG_PORT_SOC_UNIT, TS_CFG1, in quark_thermal_early_init()
179 msg_port_alt_clrsetbits(MSG_PORT_SOC_UNIT, TS_CFG1, in quark_thermal_early_init()
182 msg_port_alt_setbits(MSG_PORT_SOC_UNIT, TS_CFG1, 1 << 14); in quark_thermal_early_init()
183 msg_port_alt_clrbits(MSG_PORT_SOC_UNIT, TS_CFG1, 1 << 17); in quark_thermal_early_init()
184 msg_port_alt_clrbits(MSG_PORT_SOC_UNIT, TS_CFG1, 1 << 18); in quark_thermal_early_init()
185 msg_port_alt_clrsetbits(MSG_PORT_SOC_UNIT, TS_CFG2, 0xffff, 0x011f); in quark_thermal_early_init()
186 msg_port_alt_clrsetbits(MSG_PORT_SOC_UNIT, TS_CFG3, 0xff, 0x17); in quark_thermal_early_init()
187 msg_port_alt_clrsetbits(MSG_PORT_SOC_UNIT, TS_CFG3, in quark_thermal_early_init()
189 msg_port_alt_clrbits(MSG_PORT_SOC_UNIT, TS_CFG3, 0xff000000); in quark_thermal_early_init()
190 msg_port_alt_clrsetbits(MSG_PORT_SOC_UNIT, TS_CFG4, in quark_thermal_early_init()
200 msg_port_alt_clrbits(MSG_PORT_SOC_UNIT, TS_CFG4, 1 << 0); in quark_thermal_early_init()