Lines Matching refs:r4
65 ldr r4, =ESDMISC_SDRAM_RDY
67 ands r1, r1, r4
72 ldr r4, =ACFG_ESDMISC_VAL
73 orr r1, r4, #ESDMISC_MDDR_DL_RST
81 str r4, [r0]
98 ldr r4, =PHYS_SDRAM_1 /* CSD0 base address */
101 1: str r5,[r4] /* run auto-refresh cycle to array 0 */
109 ldr r4, = PHYS_SDRAM_1+ACFG_SDRAM_MODE_REGISTER_VAL
110 strb r2, [r4]
113 ldr r4, =PHYS_SDRAM_1+ACFG_SDRAM_EXT_MODE_REGISTER_VAL
114 strb r5, [r4]
135 ldr r4, =PHYS_SDRAM_2 /* CSD1 base address */
138 1: str r5,[r4] /* run auto-refresh cycle to array 0 */
146 ldr r4, =PHYS_SDRAM_2+ACFG_SDRAM_MODE_REGISTER_VAL
147 strb r2, [r4]
150 ldr r4, =PHYS_SDRAM_2+ACFG_SDRAM_EXT_MODE_REGISTER_VAL
151 strb r2, [r4]