Lines Matching refs:pll
17 static int select_pll_source_clk(enum pll_type pll, u32 refclk_freq) in select_pll_source_clk() argument
39 switch (pll) { in select_pll_source_clk()
50 pll_idx = pll; in select_pll_source_clk()
81 static int program_pll(enum pll_type pll, u32 refclk_freq, u32 freq0, u32 freq1, in program_pll() argument
103 if (select_pll_source_clk(pll, refclk_freq) < 0) { in program_pll()
114 PLLDIG_PLLDV_MFD(plldv_mfd), PLLDIG_PLLDV(pll)); in program_pll()
116 writel(readl(PLLDIG_PLLFD(pll)) | PLLDIG_PLLFD_MFN_SET(pllfd_mfn) | in program_pll()
117 PLLDIG_PLLFD_SMDEN, PLLDIG_PLLFD(pll)); in program_pll()
120 writel(readl(MC_ME_RUNn_MC(0)) | MC_ME_RUNMODE_MC_PLL(pll), in program_pll()
126 if ((pll == ARM_PLL) || (pll == ENET_PLL) || (pll == DDR_PLL)) { in program_pll()
128 writel(DFS_CTRL_DLL_RESET, DFS_CTRL(pll)); in program_pll()
134 DFS_DLLPRG1_V2IGC_SET(0x5), DFS_DLLPRG1(pll)); in program_pll()
140 DFS_DVPORTn(pll, i)); in program_pll()
145 writel(readl(DFS_CTRL(pll)) & ~DFS_CTRL_DLL_RESET, in program_pll()
146 DFS_CTRL(pll)); in program_pll()
147 writel(readl(DFS_PORTRESET(pll)) & in program_pll()
149 DFS_PORTRESET(pll)); in program_pll()
150 while ((readl(DFS_PORTSR(pll)) & dfs_on) != dfs_on) ; in program_pll()