Lines Matching refs:IMX_GPIO_NR
42 #define RESET_IMX535_ETHERNET_PHY_N IMX_GPIO_NR(2, 16)
43 #define UD_SCAN_CTRL IMX_GPIO_NR(5, 21)
44 #define LR_SCAN_CTRL IMX_GPIO_NR(5, 20)
45 #define LVDS0_MUX_CTRL IMX_GPIO_NR(3, 3)
46 #define LVDS1_MUX_CTRL IMX_GPIO_NR(3, 2)
47 #define HOST_CONTROLLED_RESET_TO_LCD_N IMX_GPIO_NR(5, 18)
48 #define DATA_WIDTH_CTRL IMX_GPIO_NR(5, 28)
49 #define RESET_DP0_TRANSMITTER_N IMX_GPIO_NR(2, 28)
50 #define RESET_DP1_TRANSMITTER_N IMX_GPIO_NR(2, 29)
51 #define POWER_DOWN_LVDS0_DESERIALIZER_N IMX_GPIO_NR(2, 22)
52 #define POWER_DOWN_LVDS1_DESERIALIZER_N IMX_GPIO_NR(2, 27)
53 #define ENABLE_PWR_TO_LCD_AND_UI_INTERFACE IMX_GPIO_NR(2, 17)
54 #define RESET_I2C1_BUS_SEGMENT_MUX_N IMX_GPIO_NR(2, 18)
55 #define ECSPI1_CS0 IMX_GPIO_NR(5, 17)
56 #define ECSPI1_CS1 IMX_GPIO_NR(4, 10)
57 #define ECSPI1_CS2 IMX_GPIO_NR(4, 11)
58 #define ECSPI1_CS3 IMX_GPIO_NR(4, 12)
59 #define BUFFERED_HOST_CONTROLLED_RESET_TO_DOCKING_CONNECTOR_N IMX_GPIO_NR(2, 7)