Lines Matching refs:layout
43 const struct clk_pll_layout *layout; member
115 cmul = (val & pll->layout->mul_mask) >> pll->layout->mul_shift; in sam9x60_frac_pll_set_rate()
116 cfrac = (val & pll->layout->frac_mask) >> pll->layout->frac_shift; in sam9x60_frac_pll_set_rate()
125 (nmul << pll->layout->mul_shift) | in sam9x60_frac_pll_set_rate()
126 (nfrac << pll->layout->frac_shift)); in sam9x60_frac_pll_set_rate()
153 mul = (val & pll->layout->mul_mask) >> pll->layout->mul_shift; in sam9x60_frac_pll_get_rate()
154 frac = (val & pll->layout->frac_mask) >> pll->layout->frac_shift; in sam9x60_frac_pll_get_rate()
265 if (val & pll->layout->endiv_mask) in sam9x60_div_pll_enable()
269 pll->layout->endiv_mask, in sam9x60_div_pll_enable()
270 (1 << pll->layout->endiv_shift)); in sam9x60_div_pll_enable()
293 pll->layout->endiv_mask, 0); in sam9x60_div_pll_disable()
314 if (!parent_rate || div > pll->layout->div_mask || in sam9x60_div_pll_set_rate()
323 if (div == ((val & pll->layout->div_mask) >> pll->layout->div_shift)) in sam9x60_div_pll_set_rate()
328 pll->layout->div_mask, in sam9x60_div_pll_set_rate()
329 div << pll->layout->div_shift); in sam9x60_div_pll_set_rate()
359 div = (val & pll->layout->div_mask) >> pll->layout->div_shift; in sam9x60_div_pll_get_rate()
375 const struct clk_pll_layout *layout, u32 flags) in sam9x60_clk_register_pll() argument
382 !layout || id > PLL_MAX_ID) in sam9x60_clk_register_pll()
391 pll->layout = layout; in sam9x60_clk_register_pll()
409 const struct clk_pll_layout *layout, bool critical) in sam9x60_clk_register_div_pll() argument
413 characteristics, layout, in sam9x60_clk_register_div_pll()
421 const struct clk_pll_layout *layout, bool critical) in sam9x60_clk_register_frac_pll() argument
425 characteristics, layout, in sam9x60_clk_register_frac_pll()