Lines Matching refs:div0
230 u32 clk_ctrl, div0, div1; in zynq_clk_get_dci_rate() local
234 div0 = (clk_ctrl & CLK_CTRL_DIV0_MASK) >> CLK_CTRL_DIV0_SHIFT; in zynq_clk_get_dci_rate()
238 zynq_clk_get_pll_rate(priv, ddrpll_clk), div0), div1); in zynq_clk_get_dci_rate()
246 u32 clk_ctrl, div0; in zynq_clk_get_peripheral_rate() local
251 div0 = (clk_ctrl & CLK_CTRL_DIV0_MASK) >> CLK_CTRL_DIV0_SHIFT; in zynq_clk_get_peripheral_rate()
252 if (!div0) in zynq_clk_get_peripheral_rate()
253 div0 = 1; in zynq_clk_get_peripheral_rate()
268 zynq_clk_get_pll_rate(priv, pll), div0), in zynq_clk_get_peripheral_rate()
292 u32 *div0, u32 *div1) in zynq_clk_calc_peripheral_two_divs() argument
305 *div0 = d0; in zynq_clk_calc_peripheral_two_divs()
321 u32 clk_ctrl, div0 = 0, div1 = 0; in zynq_clk_set_peripheral_rate() local
334 &div0, &div1); in zynq_clk_set_peripheral_rate()
337 div0 = DIV_ROUND_CLOSEST(pll_rate, rate); in zynq_clk_set_peripheral_rate()
338 if (div0 > ZYNQ_CLK_MAXDIV) in zynq_clk_set_peripheral_rate()
339 div0 = ZYNQ_CLK_MAXDIV; in zynq_clk_set_peripheral_rate()
340 new_rate = DIV_ROUND_CLOSEST(rate, div0); in zynq_clk_set_peripheral_rate()
342 clk_ctrl |= div0 << CLK_CTRL_DIV0_SHIFT; in zynq_clk_set_peripheral_rate()