Lines Matching refs:base_addr
63 void __iomem *base_addr = periph_hw->sys_base; in mpfs_periph_clk_enable() local
67 reg = readl(base_addr + REG_SUBBLK_RESET_CR); in mpfs_periph_clk_enable()
69 writel(val, base_addr + REG_SUBBLK_RESET_CR); in mpfs_periph_clk_enable()
71 reg = readl(base_addr + REG_SUBBLK_CLOCK_CR); in mpfs_periph_clk_enable()
73 writel(val, base_addr + REG_SUBBLK_CLOCK_CR); in mpfs_periph_clk_enable()
83 void __iomem *base_addr = periph_hw->sys_base; in mpfs_periph_clk_disable() local
87 reg = readl(base_addr + REG_SUBBLK_RESET_CR); in mpfs_periph_clk_disable()
89 writel(val, base_addr + REG_SUBBLK_RESET_CR); in mpfs_periph_clk_disable()
91 reg = readl(base_addr + REG_SUBBLK_CLOCK_CR); in mpfs_periph_clk_disable()
93 writel(val, base_addr + REG_SUBBLK_CLOCK_CR); in mpfs_periph_clk_disable()
102 void __iomem *base_addr = periph_hw->sys_base; in mpfs_periph_clk_recalc_rate() local
106 val = readl(base_addr + REG_CLOCK_CONFIG_CR) >> CFG_AHB_SHIFT; in mpfs_periph_clk_recalc_rate()