Lines Matching refs:parent
92 struct cpg_mssr_info *info, struct clk *parent) in gen3_clk_get_parent() argument
103 parent->dev = clk->dev; in gen3_clk_get_parent()
104 parent->id = core->parent >> (priv->sscg ? 16 : 0); in gen3_clk_get_parent()
105 parent->id &= 0xffff; in gen3_clk_get_parent()
110 return renesas_clk_get_parent(clk, info, parent); in gen3_clk_get_parent()
118 struct clk parent; in gen3_clk_setup_sdif_div() local
121 ret = gen3_clk_get_parent(priv, clk, info, &parent); in gen3_clk_setup_sdif_div()
127 if (renesas_clk_is_mod(&parent)) in gen3_clk_setup_sdif_div()
130 ret = renesas_clk_get_core(&parent, info, &core); in gen3_clk_setup_sdif_div()
162 struct clk parent; in gen3_clk_get_rate64() local
172 ret = gen3_clk_get_parent(priv, clk, info, &parent); in gen3_clk_get_rate64()
179 rate = gen3_clk_get_rate64(&parent); in gen3_clk_get_rate64()
181 __func__, __LINE__, parent.id, rate); in gen3_clk_get_rate64()
208 rate = gen3_clk_get_rate64(&parent) / pll_config->extal_div; in gen3_clk_get_rate64()
211 core->parent, pll_config->extal_div, rate); in gen3_clk_get_rate64()
217 rate = gen3_clk_get_rate64(&parent) * mult; in gen3_clk_get_rate64()
219 __func__, __LINE__, core->parent, mult, rate); in gen3_clk_get_rate64()
223 rate = gen3_clk_get_rate64(&parent) * pll_config->pll1_mult; in gen3_clk_get_rate64()
227 core->parent, pll_config->pll1_mult, in gen3_clk_get_rate64()
234 rate = gen3_clk_get_rate64(&parent) * mult; in gen3_clk_get_rate64()
236 __func__, __LINE__, core->parent, mult, rate); in gen3_clk_get_rate64()
240 rate = gen3_clk_get_rate64(&parent) * pll_config->pll3_mult; in gen3_clk_get_rate64()
244 core->parent, pll_config->pll3_mult, in gen3_clk_get_rate64()
251 rate = gen3_clk_get_rate64(&parent) * mult; in gen3_clk_get_rate64()
253 __func__, __LINE__, core->parent, mult, rate); in gen3_clk_get_rate64()
257 rate = (gen3_clk_get_rate64(&parent) * core->mult) / core->div; in gen3_clk_get_rate64()
260 core->parent, core->mult, core->div, rate); in gen3_clk_get_rate64()
265 rate = gen3_clk_get_rate64(&parent) / div; in gen3_clk_get_rate64()
268 (core->parent >> (priv->sscg ? 16 : 0)) & 0xffff, in gen3_clk_get_rate64()
280 rate = gen3_clk_get_rate64(&parent) / in gen3_clk_get_rate64()
284 core->parent, cpg_sd_div_table[i].div, rate); in gen3_clk_get_rate64()
292 rate = gen3_clk_get_rate64(&parent); in gen3_clk_get_rate64()
311 core->parent, prediv, postdiv, rate); in gen3_clk_get_rate64()