Lines Matching refs:no
44 u32 no; member
141 .nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no};\
158 uint output_hz = vco_hz / div->no; in rkclk_set_pll()
161 (uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz); in rkclk_set_pll()
164 (div->no == 1 || !(div->no % 2))); in rkclk_set_pll()
170 ((div->nr - 1) << CLKR_SHIFT) | (div->no - 1)); in rkclk_set_pll()
186 {.nf = 25, .nr = 2, .no = 1}, in rkclk_configure_ddr()
187 {.nf = 400, .nr = 9, .no = 2}, in rkclk_configure_ddr()
188 {.nf = 500, .nr = 9, .no = 2}, in rkclk_configure_ddr()
189 {.nf = 100, .nr = 3, .no = 1}, in rkclk_configure_ddr()
241 uint no = 1; in pll_para_config() local
249 no = DIV_ROUND_UP(VCO_MIN_KHZ, freq_khz); in pll_para_config()
251 *ext_div = DIV_ROUND_UP(no, max_no); in pll_para_config()
252 no = DIV_ROUND_UP(no, *ext_div); in pll_para_config()
256 if (no > 1) in pll_para_config()
257 no = DIV_ROUND_UP(no, 2) * 2; in pll_para_config()
259 vco_khz = freq_khz * no; in pll_para_config()
263 if (vco_khz < VCO_MIN_KHZ || vco_khz > VCO_MAX_KHZ || no > max_no) { in pll_para_config()
269 div->no = no; in pll_para_config()
547 uint32_t nr, no, nf; in rkclk_pll_get_rate() local
565 no = ((con & CLKOD_MASK) >> CLKOD_SHIFT) + 1; in rkclk_pll_get_rate()
570 return (24 * nf / (nr * no)) * 1000000; in rkclk_pll_get_rate()