Lines Matching refs:rk_clrsetreg
169 rk_clrsetreg(&pll->con0, CLKR_MASK | PLL_OD_MASK, in rkclk_set_pll()
171 rk_clrsetreg(&pll->con1, CLKF_MASK, div->nf - 1); in rkclk_set_pll()
172 rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1); in rkclk_set_pll()
212 rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK, in rkclk_configure_ddr()
222 rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK, in rkclk_configure_ddr()
332 rk_clrsetreg(&cru->cru_clksel_con[21], MAC_DIV_CON_MASK, in rockchip_mac_set_clk()
354 rk_clrsetreg(&cru->cru_mode_con, NPLL_MODE_MASK, in rockchip_vop_set_clk()
365 rk_clrsetreg(&cru->cru_mode_con, NPLL_MODE_MASK, in rockchip_vop_set_clk()
371 rk_clrsetreg(&cru->cru_clksel_con[27], 0xff << 8 | 3 << 0, in rockchip_vop_set_clk()
375 rk_clrsetreg(&cru->cru_clksel_con[29], 0xff << 8 | 3 << 6, in rockchip_vop_set_clk()
435 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
464 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
487 rk_clrsetreg(&cru->cru_clksel_con[10], in rkclk_init()
496 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
505 rk_clrsetreg(&cru->cru_mode_con, APLL_MODE_MASK, in rk3288_clk_configure_cpu()
520 rk_clrsetreg(&cru->cru_clksel_con[0], in rk3288_clk_configure_cpu()
531 rk_clrsetreg(&cru->cru_clksel_con[37], in rk3288_clk_configure_cpu()
539 rk_clrsetreg(&cru->cru_mode_con, APLL_MODE_MASK, in rk3288_clk_configure_cpu()
635 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
642 rk_clrsetreg(&cru->cru_clksel_con[11], in rockchip_mmc_set_clk()
649 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
701 rk_clrsetreg(&cru->cru_clksel_con[25], in rockchip_spi_set_clk()
707 rk_clrsetreg(&cru->cru_clksel_con[25], in rockchip_spi_set_clk()
713 rk_clrsetreg(&cru->cru_clksel_con[39], in rockchip_spi_set_clk()
743 rk_clrsetreg(&cru->cru_clksel_con[24], in rockchip_saradc_set_clk()
854 rk_clrsetreg(&cru->cru_clksel_con[31], in rk3288_clk_set_rate()
859 rk_clrsetreg(&cru->cru_clksel_con[31], in rk3288_clk_set_rate()
913 rk_clrsetreg(&cru->cru_clksel_con[21], RMII_EXTCLK_MASK, 0); in rk3288_gmac_set_parent()
929 rk_clrsetreg(&cru->cru_clksel_con[21], RMII_EXTCLK_MASK, in rk3288_gmac_set_parent()