Lines Matching refs:rwcfg
134 ratio = seq->rwcfg->mem_dq_per_read_dqs / in phy_mgr_initialize()
135 seq->rwcfg->mem_virtual_groups_per_read_dqs; in phy_mgr_initialize()
138 seq->param.read_correct_mask = (1 << seq->rwcfg->mem_dq_per_read_dqs) in phy_mgr_initialize()
140 seq->param.write_correct_mask = (1 << seq->rwcfg->mem_dq_per_write_dqs) in phy_mgr_initialize()
162 switch (seq->rwcfg->mem_number_of_ranks) { in set_rank_and_odt_mask()
169 if (seq->rwcfg->mem_number_of_cs_per_dimm == 1) { in set_rank_and_odt_mask()
328 seq->rwcfg->mem_dq_per_write_dqs, delay); in scc_mgr_set_dqs_io_in_delay()
335 seq->rwcfg->mem_dq_per_write_dqs + 1 + dm, in scc_mgr_set_dm_in_delay()
348 seq->rwcfg->mem_dq_per_write_dqs, delay); in scc_mgr_set_dqs_out1_delay()
355 seq->rwcfg->mem_dq_per_write_dqs + 1 + dm, in scc_mgr_set_dm_out1_delay()
399 for (r = 0; r < seq->rwcfg->mem_number_of_ranks; in scc_mgr_set_all_ranks()
465 const int ratio = seq->rwcfg->mem_if_read_dqs_width / in scc_mgr_set_oct_out1_delay()
466 seq->rwcfg->mem_if_write_dqs_width; in scc_mgr_set_oct_out1_delay()
522 for (r = 0; r < seq->rwcfg->mem_number_of_ranks; in scc_mgr_zero_all()
524 for (i = 0; i < seq->rwcfg->mem_if_read_dqs_width; i++) { in scc_mgr_zero_all()
537 for (i = 0; i < seq->rwcfg->mem_if_write_dqs_width; i++) { in scc_mgr_zero_all()
581 const int ratio = seq->rwcfg->mem_if_read_dqs_width / in scc_mgr_load_dqs_for_write_group()
582 seq->rwcfg->mem_if_write_dqs_width; in scc_mgr_load_dqs_for_write_group()
606 for (r = 0; r < seq->rwcfg->mem_number_of_ranks; in scc_mgr_zero_group()
609 for (i = 0; i < seq->rwcfg->mem_dq_per_write_dqs; i++) { in scc_mgr_zero_group()
655 for (i = 0, p = group_bgn; i < seq->rwcfg->mem_dq_per_read_dqs; in scc_mgr_apply_group_dq_in_delay()
674 for (i = 0; i < seq->rwcfg->mem_dq_per_write_dqs; i++) { in scc_mgr_apply_group_dq_out1_delay()
719 for (i = 0; i < seq->rwcfg->mem_dq_per_write_dqs; i++) in scc_mgr_apply_group_all_out_delay_add()
770 for (r = 0; r < seq->rwcfg->mem_number_of_ranks; in scc_mgr_apply_group_all_out_delay_add_all_ranks()
791 writel(seq->rwcfg->rreturn, &sdr_rw_load_jump_mgr_regs->load_jump_add0); in set_jump_as_return()
847 writel(seq->rwcfg->idle_loop1, in delay_for_n_mem_clocks()
850 writel(seq->rwcfg->idle_loop1, SDR_PHYGRP_RWMGRGRP_ADDRESS | in delay_for_n_mem_clocks()
859 writel(seq->rwcfg->idle_loop2, in delay_for_n_mem_clocks()
862 writel(seq->rwcfg->idle_loop2, in delay_for_n_mem_clocks()
866 writel(seq->rwcfg->idle_loop2, in delay_for_n_mem_clocks()
925 for (r = 0; r < seq->rwcfg->mem_number_of_ranks; r++) { in rw_mgr_mem_load_user_ddr2()
930 writel(seq->rwcfg->precharge_all, grpaddr); in rw_mgr_mem_load_user_ddr2()
932 writel(seq->rwcfg->emr2, grpaddr); in rw_mgr_mem_load_user_ddr2()
933 writel(seq->rwcfg->emr3, grpaddr); in rw_mgr_mem_load_user_ddr2()
934 writel(seq->rwcfg->emr, grpaddr); in rw_mgr_mem_load_user_ddr2()
937 writel(seq->rwcfg->mr_user, grpaddr); in rw_mgr_mem_load_user_ddr2()
941 writel(seq->rwcfg->mr_dll_reset, grpaddr); in rw_mgr_mem_load_user_ddr2()
943 writel(seq->rwcfg->precharge_all, grpaddr); in rw_mgr_mem_load_user_ddr2()
945 writel(seq->rwcfg->refresh, grpaddr); in rw_mgr_mem_load_user_ddr2()
947 writel(seq->rwcfg->refresh, grpaddr); in rw_mgr_mem_load_user_ddr2()
950 writel(seq->rwcfg->mr_calib, grpaddr); in rw_mgr_mem_load_user_ddr2()
952 writel(seq->rwcfg->emr, grpaddr); in rw_mgr_mem_load_user_ddr2()
973 for (r = 0; r < seq->rwcfg->mem_number_of_ranks; r++) { in rw_mgr_mem_load_user_ddr3()
979 writel(seq->rwcfg->precharge_all, grpaddr); in rw_mgr_mem_load_user_ddr3()
985 if ((seq->rwcfg->mem_address_mirroring >> r) & 0x1) { in rw_mgr_mem_load_user_ddr3()
987 writel(seq->rwcfg->mrs2_mirr, grpaddr); in rw_mgr_mem_load_user_ddr3()
990 writel(seq->rwcfg->mrs3_mirr, grpaddr); in rw_mgr_mem_load_user_ddr3()
993 writel(seq->rwcfg->mrs1_mirr, grpaddr); in rw_mgr_mem_load_user_ddr3()
999 writel(seq->rwcfg->mrs2, grpaddr); in rw_mgr_mem_load_user_ddr3()
1002 writel(seq->rwcfg->mrs3, grpaddr); in rw_mgr_mem_load_user_ddr3()
1005 writel(seq->rwcfg->mrs1, grpaddr); in rw_mgr_mem_load_user_ddr3()
1014 writel(seq->rwcfg->zqcl, grpaddr); in rw_mgr_mem_load_user_ddr3()
1081 seq->rwcfg->init_reset_0_cke_0); in rw_mgr_mem_initialize()
1087 writel(seq->rwcfg->nop, SDR_PHYGRP_RWMGRGRP_ADDRESS | in rw_mgr_mem_initialize()
1112 seq->rwcfg->init_reset_1_cke_0); in rw_mgr_mem_initialize()
1119 rw_mgr_mem_load_user(seq, seq->rwcfg->mrs0_dll_reset_mirr, in rw_mgr_mem_initialize()
1120 seq->rwcfg->mrs0_dll_reset, 0); in rw_mgr_mem_initialize()
1131 rw_mgr_mem_load_user(seq, seq->rwcfg->mrs0_user_mirr, in rw_mgr_mem_handoff()
1132 seq->rwcfg->mrs0_user, 1); in rw_mgr_mem_handoff()
1196 mcc_instruction = seq->rwcfg->lfsr_wr_rd_dm_bank_0_wl_1; in rw_mgr_mem_calibrate_write_test_issue()
1197 writel(seq->rwcfg->lfsr_wr_rd_dm_bank_0_data, in rw_mgr_mem_calibrate_write_test_issue()
1199 writel(seq->rwcfg->lfsr_wr_rd_dm_bank_0_nop, in rw_mgr_mem_calibrate_write_test_issue()
1202 mcc_instruction = seq->rwcfg->lfsr_wr_rd_bank_0_wl_1; in rw_mgr_mem_calibrate_write_test_issue()
1203 writel(seq->rwcfg->lfsr_wr_rd_bank_0_data, in rw_mgr_mem_calibrate_write_test_issue()
1205 writel(seq->rwcfg->lfsr_wr_rd_bank_0_nop, in rw_mgr_mem_calibrate_write_test_issue()
1218 mcc_instruction = seq->rwcfg->lfsr_wr_rd_dm_bank_0; in rw_mgr_mem_calibrate_write_test_issue()
1219 writel(seq->rwcfg->lfsr_wr_rd_dm_bank_0_dqs, in rw_mgr_mem_calibrate_write_test_issue()
1222 mcc_instruction = seq->rwcfg->lfsr_wr_rd_bank_0; in rw_mgr_mem_calibrate_write_test_issue()
1223 writel(seq->rwcfg->lfsr_wr_rd_bank_0_dqs, in rw_mgr_mem_calibrate_write_test_issue()
1241 mcc_instruction = seq->rwcfg->lfsr_wr_rd_dm_bank_0; in rw_mgr_mem_calibrate_write_test_issue()
1242 writel(seq->rwcfg->lfsr_wr_rd_dm_bank_0_nop, in rw_mgr_mem_calibrate_write_test_issue()
1245 mcc_instruction = seq->rwcfg->lfsr_wr_rd_bank_0; in rw_mgr_mem_calibrate_write_test_issue()
1246 writel(seq->rwcfg->lfsr_wr_rd_bank_0_nop, in rw_mgr_mem_calibrate_write_test_issue()
1268 writel(seq->rwcfg->lfsr_wr_rd_dm_bank_0_wait, in rw_mgr_mem_calibrate_write_test_issue()
1271 writel(seq->rwcfg->lfsr_wr_rd_bank_0_wait, in rw_mgr_mem_calibrate_write_test_issue()
1299 seq->rwcfg->mem_number_of_ranks : in rw_mgr_mem_calibrate_write_test()
1301 const u32 shift_ratio = seq->rwcfg->mem_dq_per_write_dqs / in rw_mgr_mem_calibrate_write_test()
1302 seq->rwcfg->mem_virtual_groups_per_write_dqs; in rw_mgr_mem_calibrate_write_test()
1315 for (vg = seq->rwcfg->mem_virtual_groups_per_write_dqs - 1; in rw_mgr_mem_calibrate_write_test()
1321 seq->rwcfg->mem_virtual_groups_per_write_dqs in rw_mgr_mem_calibrate_write_test()
1367 (group * seq->rwcfg->mem_virtual_groups_per_read_dqs) in rw_mgr_mem_calibrate_read_test_patterns()
1370 seq->rwcfg->mem_number_of_ranks : in rw_mgr_mem_calibrate_read_test_patterns()
1372 const u32 shift_ratio = seq->rwcfg->mem_dq_per_read_dqs / in rw_mgr_mem_calibrate_read_test_patterns()
1373 seq->rwcfg->mem_virtual_groups_per_read_dqs; in rw_mgr_mem_calibrate_read_test_patterns()
1388 writel(seq->rwcfg->guaranteed_read, in rw_mgr_mem_calibrate_read_test_patterns()
1392 writel(seq->rwcfg->guaranteed_read_cont, in rw_mgr_mem_calibrate_read_test_patterns()
1396 for (vg = seq->rwcfg->mem_virtual_groups_per_read_dqs - 1; in rw_mgr_mem_calibrate_read_test_patterns()
1402 writel(seq->rwcfg->guaranteed_read, in rw_mgr_mem_calibrate_read_test_patterns()
1413 writel(seq->rwcfg->clear_dqs_enable, addr + (group << 2)); in rw_mgr_mem_calibrate_read_test_patterns()
1441 seq->rwcfg->mem_number_of_ranks : in rw_mgr_mem_calibrate_read_load_patterns()
1454 writel(seq->rwcfg->guaranteed_write_wait0, in rw_mgr_mem_calibrate_read_load_patterns()
1459 writel(seq->rwcfg->guaranteed_write_wait1, in rw_mgr_mem_calibrate_read_load_patterns()
1464 writel(seq->rwcfg->guaranteed_write_wait2, in rw_mgr_mem_calibrate_read_load_patterns()
1469 writel(seq->rwcfg->guaranteed_write_wait3, in rw_mgr_mem_calibrate_read_load_patterns()
1472 writel(seq->rwcfg->guaranteed_write, in rw_mgr_mem_calibrate_read_load_patterns()
1501 const u32 rank_end = all_ranks ? seq->rwcfg->mem_number_of_ranks : in rw_mgr_mem_calibrate_read_test()
1521 writel(seq->rwcfg->read_b2b_wait1, in rw_mgr_mem_calibrate_read_test()
1525 writel(seq->rwcfg->read_b2b_wait2, in rw_mgr_mem_calibrate_read_test()
1536 writel(seq->rwcfg->read_b2b, in rw_mgr_mem_calibrate_read_test()
1539 writel(seq->rwcfg->mem_if_read_dqs_width * in rw_mgr_mem_calibrate_read_test()
1540 seq->rwcfg->mem_virtual_groups_per_read_dqs - 1, in rw_mgr_mem_calibrate_read_test()
1545 writel(seq->rwcfg->read_b2b, in rw_mgr_mem_calibrate_read_test()
1549 for (vg = seq->rwcfg->mem_virtual_groups_per_read_dqs - 1; in rw_mgr_mem_calibrate_read_test()
1564 writel(seq->rwcfg->read_b2b, addr + in rw_mgr_mem_calibrate_read_test()
1566 seq->rwcfg->mem_virtual_groups_per_read_dqs + in rw_mgr_mem_calibrate_read_test()
1571 seq->rwcfg->mem_dq_per_read_dqs / in rw_mgr_mem_calibrate_read_test()
1572 seq->rwcfg->mem_virtual_groups_per_read_dqs; in rw_mgr_mem_calibrate_read_test()
1580 writel(seq->rwcfg->clear_dqs_enable, addr + (group << 2)); in rw_mgr_mem_calibrate_read_test()
2127 const u32 ratio = seq->rwcfg->mem_if_read_dqs_width / in search_stop_check()
2128 seq->rwcfg->mem_if_write_dqs_width; in search_stop_check()
2131 const u32 per_dqs = write ? seq->rwcfg->mem_dq_per_write_dqs : in search_stop_check()
2132 seq->rwcfg->mem_dq_per_read_dqs; in search_stop_check()
2188 const u32 per_dqs = write ? seq->rwcfg->mem_dq_per_write_dqs : in search_left_edge()
2189 seq->rwcfg->mem_dq_per_read_dqs; in search_left_edge()
2300 const u32 per_dqs = write ? seq->rwcfg->mem_dq_per_write_dqs : in search_right_edge()
2301 seq->rwcfg->mem_dq_per_read_dqs; in search_right_edge()
2329 i < seq->rwcfg->mem_dq_per_write_dqs; in search_right_edge()
2421 const u32 per_dqs = write ? seq->rwcfg->mem_dq_per_write_dqs : in get_window_mid_index()
2422 seq->rwcfg->mem_dq_per_read_dqs; in get_window_mid_index()
2473 const s32 per_dqs = write ? seq->rwcfg->mem_dq_per_write_dqs : in center_dq_windows()
2474 seq->rwcfg->mem_dq_per_read_dqs; in center_dq_windows()
2556 s32 left_edge[seq->rwcfg->mem_dq_per_read_dqs]; in rw_mgr_mem_calibrate_vfifo_center()
2557 s32 right_edge[seq->rwcfg->mem_dq_per_read_dqs]; in rw_mgr_mem_calibrate_vfifo_center()
2573 for (i = 0; i < seq->rwcfg->mem_dq_per_read_dqs; i++) { in rw_mgr_mem_calibrate_vfifo_center()
2607 seq->rwcfg->mem_dq_per_read_dqs + i, in rw_mgr_mem_calibrate_vfifo_center()
2612 seq->rwcfg->mem_dq_per_read_dqs + i, in rw_mgr_mem_calibrate_vfifo_center()
2743 (seq->rwcfg->mem_dq_per_read_dqs - 1); in rw_mgr_mem_calibrate_dqs_enable_calibration()
2750 for (r = 0; r < seq->rwcfg->mem_number_of_ranks; in rw_mgr_mem_calibrate_dqs_enable_calibration()
2753 i < seq->rwcfg->mem_dq_per_read_dqs; in rw_mgr_mem_calibrate_dqs_enable_calibration()
2776 for (r = 0; r < seq->rwcfg->mem_number_of_ranks; in rw_mgr_mem_calibrate_dqs_enable_calibration()
2811 rank_bgn < seq->rwcfg->mem_number_of_ranks; in rw_mgr_mem_calibrate_dq_dqs_centering()
3132 int left_edge[seq->rwcfg->mem_dq_per_write_dqs]; in rw_mgr_mem_calibrate_writes_center()
3133 int right_edge[seq->rwcfg->mem_dq_per_write_dqs]; in rw_mgr_mem_calibrate_writes_center()
3152 (seq->rwcfg->mem_dq_per_write_dqs << 2)); in rw_mgr_mem_calibrate_writes_center()
3161 for (i = 0; i < seq->rwcfg->mem_dq_per_write_dqs; i++) { in rw_mgr_mem_calibrate_writes_center()
3319 for (r = 0; r < seq->rwcfg->mem_number_of_ranks; r++) { in mem_precharge_and_activate()
3324 writel(seq->rwcfg->precharge_all, SDR_PHYGRP_RWMGRGRP_ADDRESS | in mem_precharge_and_activate()
3328 writel(seq->rwcfg->activate_0_and_1_wait1, in mem_precharge_and_activate()
3332 writel(seq->rwcfg->activate_0_and_1_wait2, in mem_precharge_and_activate()
3336 writel(seq->rwcfg->activate_0_and_1, in mem_precharge_and_activate()
3395 for (r = 0; r < seq->rwcfg->mem_number_of_ranks; in mem_skip_calibrate()
3401 for (i = 0; i < seq->rwcfg->mem_if_read_dqs_width; i++) { in mem_skip_calibrate()
3441 for (i = 0; i < seq->rwcfg->mem_if_write_dqs_width; i++) { in mem_skip_calibrate()
3451 for (i = 0; i < seq->rwcfg->mem_if_read_dqs_width; i++) { in mem_skip_calibrate()
3489 const u32 rwdqs_ratio = seq->rwcfg->mem_if_read_dqs_width / in mem_calibrate()
3490 seq->rwcfg->mem_if_write_dqs_width; in mem_calibrate()
3507 for (i = 0; i < seq->rwcfg->mem_if_read_dqs_width; i++) { in mem_calibrate()
3544 < seq->rwcfg->mem_if_write_dqs_width; write_group++, in mem_calibrate()
3545 write_test_bgn += seq->rwcfg->mem_dq_per_write_dqs) { in mem_calibrate()
3565 read_test_bgn += seq->rwcfg->mem_dq_per_read_dqs) { in mem_calibrate()
3584 rank_bgn < seq->rwcfg->mem_number_of_ranks; in mem_calibrate()
3614 read_test_bgn += seq->rwcfg->mem_dq_per_read_dqs) { in mem_calibrate()
3881 writel((seq->rwcfg->idle << 24) | in initialize_tracking()
3882 (seq->rwcfg->activate_1 << 16) | in initialize_tracking()
3883 (seq->rwcfg->sgle_read << 8) | in initialize_tracking()
3884 (seq->rwcfg->precharge_all << 0), in initialize_tracking()
3888 writel(seq->rwcfg->mem_if_read_dqs_width, in initialize_tracking()
3895 writel((seq->rwcfg->refresh_all << 24) | (1000 << 0), in initialize_tracking()
3914 seq.rwcfg = socfpga_get_sdram_rwmgr_config(); in sdram_calibration_full()
3942 seq.rwcfg->mem_number_of_ranks, in sdram_calibration_full()
3943 seq.rwcfg->mem_number_of_cs_per_dimm, in sdram_calibration_full()
3944 seq.rwcfg->mem_dq_per_read_dqs, in sdram_calibration_full()
3945 seq.rwcfg->mem_dq_per_write_dqs, in sdram_calibration_full()
3946 seq.rwcfg->mem_virtual_groups_per_read_dqs, in sdram_calibration_full()
3947 seq.rwcfg->mem_virtual_groups_per_write_dqs); in sdram_calibration_full()
3950 seq.rwcfg->mem_if_read_dqs_width, in sdram_calibration_full()
3951 seq.rwcfg->mem_if_write_dqs_width, in sdram_calibration_full()
3952 seq.rwcfg->mem_data_width, seq.rwcfg->mem_data_mask_width, in sdram_calibration_full()