Lines Matching refs:val32
47 u32 val32; in fsl_ddr_set_memctl_regs() local
358 val32 = ddr_in32(&ddr->debug[28]); in fsl_ddr_set_memctl_regs()
359 val32 |= (0x9 << 20); in fsl_ddr_set_memctl_regs()
360 ddr_out32(&ddr->debug[28], val32); in fsl_ddr_set_memctl_regs()
367 val32 = in_be32(&ddr->sdram_cfg_2) | 0x800; /* DDR_SLOW */ in fsl_ddr_set_memctl_regs()
368 out_be32(&ddr->sdram_cfg_2, val32); in fsl_ddr_set_memctl_regs()
370 val32 = in_be32(&ddr->debug[18]) | 0x2; in fsl_ddr_set_memctl_regs()
371 out_be32(&ddr->debug[18], val32); in fsl_ddr_set_memctl_regs()
379 val32 = in_be32(&ddr->debug[28]); in fsl_ddr_set_memctl_regs()
380 val32 &= 0xff0fff00; in fsl_ddr_set_memctl_regs()
382 val32 |= 0x0080006a; in fsl_ddr_set_memctl_regs()
384 val32 |= 0x0070006f; in fsl_ddr_set_memctl_regs()
386 val32 |= 0x00700076; in fsl_ddr_set_memctl_regs()
388 val32 |= 0x0060007b; in fsl_ddr_set_memctl_regs()
390 out_be32(&ddr->debug[28], val32); in fsl_ddr_set_memctl_regs()