Lines Matching refs:tmp

162 	unsigned int tmp;  in lpddr4_mr_write()  local
170 tmp = reg32_read(DDRC_MRSTAT(0)); in lpddr4_mr_write()
171 } while (tmp & 0x1); in lpddr4_mr_write()
183 unsigned int tmp; in lpddr4_mr_read() local
187 tmp = reg32_read(DDRC_MRSTAT(0)); in lpddr4_mr_read()
188 } while (tmp & 0x1); in lpddr4_mr_read()
194 tmp = reg32_read(DRC_PERF_MON_MRR0_DAT(0)); in lpddr4_mr_read()
195 } while ((tmp & 0x8) == 0); in lpddr4_mr_read()
196 tmp = reg32_read(DRC_PERF_MON_MRR1_DAT(0)); in lpddr4_mr_read()
197 tmp = tmp & 0xff; in lpddr4_mr_read()
200 return tmp; in lpddr4_mr_read()
218 unsigned int i, ddr_type, tmp; in get_trained_CDD() local
226 tmp = reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + (0x54013 + i) * 4); in get_trained_CDD()
227 cdd_cha[i * 2] = tmp & 0xff; in get_trained_CDD()
228 cdd_cha[i * 2 + 1] = (tmp >> 8) & 0xff; in get_trained_CDD()
232 tmp = reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + (0x5402c + i) * 4); in get_trained_CDD()
234 cdd_cha[0] = (tmp >> 8) & 0xff; in get_trained_CDD()
236 cdd_cha[11] = tmp & 0xff; in get_trained_CDD()
238 cdd_chb[i * 2 - 1] = tmp & 0xff; in get_trained_CDD()
239 cdd_chb[i * 2] = (tmp >> 8) & 0xff; in get_trained_CDD()
259 tmp = reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + (0x54012 + i) * 4); in get_trained_CDD()
260 ddr4_cdd[i * 2] = tmp & 0xff; in get_trained_CDD()
261 ddr4_cdd[i * 2 + 1] = (tmp >> 8) & 0xff; in get_trained_CDD()
274 unsigned int addr_slot, rdata, tmp, tmp_t; in update_umctl2_rank_space_setting() local
285 tmp = ddrc_w2r + (g_cdd_wr_max[i] >> 1); in update_umctl2_rank_space_setting()
287 tmp = ddrc_w2r + (g_cdd_wr_max[i] >> 1) + 1; in update_umctl2_rank_space_setting()
288 ddrc_w2r = (tmp > 0x3f) ? 0x3f : tmp; in update_umctl2_rank_space_setting()
292 tmp = ddrc_r2w + (g_cdd_rw_max[i] >> 1); in update_umctl2_rank_space_setting()
294 tmp = ddrc_r2w + (g_cdd_rw_max[i] >> 1) + 1; in update_umctl2_rank_space_setting()
295 ddrc_r2w = (tmp > 0x3f) ? 0x3f : tmp; in update_umctl2_rank_space_setting()
304 tmp = ddrc_w2r + (g_cdd_wr_max[i] >> 1); in update_umctl2_rank_space_setting()
306 tmp = ddrc_w2r + (g_cdd_wr_max[i] >> 1) + 1; in update_umctl2_rank_space_setting()
307 ddrc_w2r = (tmp > 0x3f) ? 0x3f : tmp; in update_umctl2_rank_space_setting()
315 tmp = ddrc_r2w + (g_cdd_rw_max[i] >> 1); in update_umctl2_rank_space_setting()
317 tmp = ddrc_r2w + (g_cdd_rw_max[i] >> 1) + 1; in update_umctl2_rank_space_setting()
318 ddrc_r2w = (tmp > 0x3f) ? 0x3f : tmp; in update_umctl2_rank_space_setting()
329 tmp = ddrc_wr_gap + (g_cdd_ww_max[i] >> 1); in update_umctl2_rank_space_setting()
331 tmp = ddrc_wr_gap + (g_cdd_ww_max[i] >> 1) + 1; in update_umctl2_rank_space_setting()
332 ddrc_wr_gap = (tmp > 0xf) ? 0xf : tmp; in update_umctl2_rank_space_setting()
336 tmp = ddrc_rd_gap + (g_cdd_rr_max[i] >> 1); in update_umctl2_rank_space_setting()
338 tmp = ddrc_rd_gap + (g_cdd_rr_max[i] >> 1) + 1; in update_umctl2_rank_space_setting()
339 ddrc_rd_gap = (tmp > 0xf) ? 0xf : tmp; in update_umctl2_rank_space_setting()
350 tmp = ddrc_wr_gap + (g_cdd_ww_max[0] >> 1) + 1; in update_umctl2_rank_space_setting()
351 ddrc_wr_gap = (tmp > 0xf) ? 0xf : tmp; in update_umctl2_rank_space_setting()
354 tmp = ddrc_rd_gap + (g_cdd_rr_max[0] >> 1) + 1; in update_umctl2_rank_space_setting()
355 ddrc_rd_gap = (tmp > 0xf) ? 0xf : tmp; in update_umctl2_rank_space_setting()