Lines Matching refs:data_value

343 	u32 data_value = 0, cs_cnt = 0,  in hws_ddr3_tip_init_controller()  local
395 data_value = (0x4000 | 0 | 0x1000000) & ~(1 << 26); in hws_ddr3_tip_init_controller()
397 data_value = (0x4000 | 0x8000 | 0x1000000) & ~(1 << 26); in hws_ddr3_tip_init_controller()
403 SDRAM_CFG_REG, data_value, in hws_ddr3_tip_init_controller()
463 data_value = 0x7; in hws_ddr3_tip_init_controller()
475 data_value = in hws_ddr3_tip_init_controller()
527 data_value = in hws_ddr3_tip_init_controller()
532 MR0_REG, data_value, in hws_ddr3_tip_init_controller()
554 data_value = (cwl_mask_table[cwl_val] << 3); in hws_ddr3_tip_init_controller()
555 data_value |= in hws_ddr3_tip_init_controller()
559 data_value |= g_rtt_wr; in hws_ddr3_tip_init_controller()
562 MR2_REG, data_value, in hws_ddr3_tip_init_controller()
625 data_value = in hws_ddr3_tip_init_controller()
629 DUNIT_CTRL_HIGH_REG, data_value, in hws_ddr3_tip_init_controller()
681 u32 data_value = 0, bus_cnt = 0; in ddr3_tip_rev2_rank_control() local
687 data_value |= tm->interface_params[if_id].as_bus_params[bus_cnt]. in ddr3_tip_rev2_rank_control()
698 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev2_rank_control()
705 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev2_rank_control()
712 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev2_rank_control()
719 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev2_rank_control()
728 data_value, 0xff)); in ddr3_tip_rev2_rank_control()
735 u32 data_value = 0, bus_cnt; in ddr3_tip_rev3_rank_control() local
754 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev3_rank_control()
756 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev3_rank_control()
761 data_value, 0xff)); in ddr3_tip_rev3_rank_control()
995 u32 if_id, u32 reg_addr, u32 data_value, u32 mask) in ddr3_tip_if_write() argument
997 config_func_info[dev_num].mv_ddr_dunit_write(reg_addr, mask, data_value); in ddr3_tip_if_write()
1082 u32 data_value) in ddr3_tip_bus_write() argument
1085 mv_ddr_phy_write(phy_access, phy_id, phy_type, reg_addr, data_value, OPERATION_WRITE); in ddr3_tip_bus_write()
1095 u32 data_value, u32 reg_mask) in ddr3_tip_bus_read_modify_write() argument
1113 data_value = (data_val & (~reg_mask)) | (data_value & reg_mask); in ddr3_tip_bus_read_modify_write()
1117 data_value)); in ddr3_tip_bus_read_modify_write()