Lines Matching refs:subphy
230 u32 subphy, read_data; in mv_ddr_tip_bist() local
236 for (subphy = 0; subphy < max_subphy; subphy++) { in mv_ddr_tip_bist()
237 ddr3_tip_if_read(0, ACCESS_TYPE_UNICAST, 0, reg_map[subphy], &read_data, MASK_ALL_BITS); in mv_ddr_tip_bist()
239 *result |= (FAIL << subphy); in mv_ddr_tip_bist()
493 u32 subphy; in mv_ddr_dm_vw_get() local
573 for (subphy = 0; subphy < subphy_max; subphy++) { in mv_ddr_dm_vw_get()
574 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, subphy); in mv_ddr_dm_vw_get()
576 subphy, DDR_PHY_DATA, CTX_PHY_REG(cs), in mv_ddr_dm_vw_get()
577 wr_ctrl_adll[subphy]); in mv_ddr_dm_vw_get()
587 for (subphy = 0; subphy < subphy_max; subphy++) { in mv_ddr_dm_vw_get()
588 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, subphy); in mv_ddr_dm_vw_get()
589 idx = ADLL_TAPS_PER_PERIOD * subphy + adll_tap; in mv_ddr_dm_vw_get()
590 vw_vector[idx] |= ((result >> subphy) & 0x1); in mv_ddr_dm_vw_get()
595 for (subphy = 0; subphy < subphy_max; subphy++) { in mv_ddr_dm_vw_get()
596 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, subphy); in mv_ddr_dm_vw_get()
598 subphy, DDR_PHY_DATA, CRX_PHY_REG(cs), in mv_ddr_dm_vw_get()
599 rd_ctrl_adll[subphy]); in mv_ddr_dm_vw_get()