Lines Matching refs:subphy_id
1679 int i, subphy_id, step; in mv_ddr_rl_dqs_burst() local
1715 for (subphy_id = 0; subphy_id < MAX_BUS_NUM; subphy_id++) in mv_ddr_rl_dqs_burst()
1717 if (IS_BUS_ACTIVE(tm->bus_act_mask, subphy_id) == 0) in mv_ddr_rl_dqs_burst()
1781 for (subphy_id = 0; subphy_id < MAX_BUS_NUM; subphy_id++) { in mv_ddr_rl_dqs_burst()
1782 if (rl_state[effective_cs][subphy_id][if_id] == RL_BEHIND) in mv_ddr_rl_dqs_burst()
1784 ddr3_tip_bus_read(dev_num, if_id, ACCESS_TYPE_UNICAST, subphy_id, DDR_PHY_DATA, in mv_ddr_rl_dqs_burst()
1786 ddr3_tip_bus_read(dev_num, if_id, ACCESS_TYPE_UNICAST, subphy_id, DDR_PHY_DATA, in mv_ddr_rl_dqs_burst()
1790 __func__, effective_cs, i, subphy_id, in mv_ddr_rl_dqs_burst()
1791 rl_state[effective_cs][subphy_id][if_id], in mv_ddr_rl_dqs_burst()
1794 switch (rl_state[effective_cs][subphy_id][if_id]) { in mv_ddr_rl_dqs_burst()
1799 rl_state[effective_cs][subphy_id][if_id] = RL_INSIDE; in mv_ddr_rl_dqs_burst()
1800 rl_values[effective_cs][subphy_id][if_id] = i; in mv_ddr_rl_dqs_burst()
1801 rl_min_values[effective_cs][subphy_id][if_id] = i; in mv_ddr_rl_dqs_burst()
1804 rl_state[effective_cs][subphy_id][if_id])); in mv_ddr_rl_dqs_burst()
1824 rl_max_values[effective_cs][subphy_id][if_id] = i; in mv_ddr_rl_dqs_burst()
1825 if ((rl_max_values[effective_cs][subphy_id][if_id] - in mv_ddr_rl_dqs_burst()
1826 rl_min_values[effective_cs][subphy_id][if_id]) > in mv_ddr_rl_dqs_burst()
1828 rl_state[effective_cs][subphy_id][if_id] = RL_BEHIND; in mv_ddr_rl_dqs_burst()
1829 rl_values[effective_cs][subphy_id][if_id] = in mv_ddr_rl_dqs_burst()
1830 (i + rl_values[effective_cs][subphy_id][if_id]) / 2; in mv_ddr_rl_dqs_burst()
1835 rl_values[effective_cs][subphy_id][if_id]) in mv_ddr_rl_dqs_burst()
1837 rl_values[effective_cs][subphy_id][if_id]; in mv_ddr_rl_dqs_burst()
1839 rl_values[effective_cs][subphy_id][if_id]) in mv_ddr_rl_dqs_burst()
1841 rl_values[effective_cs][subphy_id][if_id]; in mv_ddr_rl_dqs_burst()
1847 if ((i - rl_values[effective_cs][subphy_id][if_id]) < in mv_ddr_rl_dqs_burst()
1850 rl_state[effective_cs][subphy_id][if_id] = RL_AHEAD; in mv_ddr_rl_dqs_burst()
1853 rl_state[effective_cs][subphy_id][if_id])); in mv_ddr_rl_dqs_burst()
1855 rl_state[effective_cs][subphy_id][if_id] = RL_BEHIND; in mv_ddr_rl_dqs_burst()
1856 rl_values[effective_cs][subphy_id][if_id] = in mv_ddr_rl_dqs_burst()
1857 (i + rl_values[effective_cs][subphy_id][if_id]) / 2; in mv_ddr_rl_dqs_burst()
1860 rl_state[effective_cs][subphy_id][if_id], in mv_ddr_rl_dqs_burst()
1861 rl_values[effective_cs][subphy_id][if_id])); in mv_ddr_rl_dqs_burst()
1866 rl_values[effective_cs][subphy_id][if_id]) in mv_ddr_rl_dqs_burst()
1868 rl_values[effective_cs][subphy_id][if_id]; in mv_ddr_rl_dqs_burst()
1870 rl_values[effective_cs][subphy_id][if_id]) in mv_ddr_rl_dqs_burst()
1872 rl_values[effective_cs][subphy_id][if_id]; in mv_ddr_rl_dqs_burst()
1892 for (subphy_id = 0; subphy_id < MAX_BUS_NUM; subphy_id++) { in mv_ddr_rl_dqs_burst()
1893 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, subphy_id); in mv_ddr_rl_dqs_burst()
1896 __func__, subphy_id, in mv_ddr_rl_dqs_burst()
1897 (rl_state[effective_cs][subphy_id][if_id] == RL_BEHIND) ? in mv_ddr_rl_dqs_burst()
1926 for (subphy_id = 0; subphy_id < MAX_BUS_NUM; subphy_id++) { in mv_ddr_rl_dqs_burst()
1927 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, subphy_id); in mv_ddr_rl_dqs_burst()
1929 i = rl_values[effective_cs][subphy_id][if_id] - (sdr_cycle_incr * TAPS_PER_RD_SAMPLE); in mv_ddr_rl_dqs_burst()
1935 __func__, effective_cs, subphy_id, final_rd_sample, in mv_ddr_rl_dqs_burst()
1941 subphy_id, subphy_type, RL_PHY_REG(effective_cs), rl_val); in mv_ddr_rl_dqs_burst()