Lines Matching refs:cs
118 u32 cs = 0; in ddr3_dfs_high_2_low() local
196 for (cs = 0; cs < MAX_CS; cs++) { in ddr3_dfs_high_2_low()
197 if (dram_info->cs_ena & (1 << cs)) { in ddr3_dfs_high_2_low()
199 (cs << MR_CS_ADDR_OFFS)); in ddr3_dfs_high_2_low()
202 (cs << MR_CS_ADDR_OFFS), reg); in ddr3_dfs_high_2_low()
442 for (cs = 0; cs < MAX_CS; cs++) { in ddr3_dfs_high_2_low()
443 if (dram_info->cs_ena & (1 << cs)) in ddr3_dfs_high_2_low()
444 reg &= ~(1 << (REG_SDRAM_OPERATION_CS_OFFS + cs)); in ddr3_dfs_high_2_low()
468 for (cs = 0; cs < MAX_CS; cs++) { in ddr3_dfs_high_2_low()
469 if (dram_info->cs_ena & (1 << cs)) { in ddr3_dfs_high_2_low()
472 (cs << MR_CS_ADDR_OFFS)) & in ddr3_dfs_high_2_low()
478 (cs << MR_CS_ADDR_OFFS), reg); in ddr3_dfs_high_2_low()
482 (cs << MR_CS_ADDR_OFFS)) in ddr3_dfs_high_2_low()
487 (cs << MR_CS_ADDR_OFFS), reg); in ddr3_dfs_high_2_low()
499 u32 cs = 0; in ddr3_dfs_high_2_low()
676 for (cs = 0; cs < MAX_CS; cs++) { in ddr3_dfs_high_2_low()
677 if (dram_info->cs_ena & (1 << cs)) { in ddr3_dfs_high_2_low()
687 ~(1 << (REG_SDRAM_OPERATION_CS_OFFS + cs)); in ddr3_dfs_high_2_low()
700 ~(1 << (REG_SDRAM_OPERATION_CS_OFFS + cs)); in ddr3_dfs_high_2_low()
710 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_dfs_high_2_low()
711 reg |= (5 << (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_dfs_high_2_low()
717 (REG_READ_DATA_READY_DELAYS_OFFS * cs)); in ddr3_dfs_high_2_low()
718 reg |= ((6) << (REG_READ_DATA_READY_DELAYS_OFFS * cs)); in ddr3_dfs_high_2_low()
774 u32 cs = 0; in ddr3_dfs_low_2_high() local
1005 for (cs = 0; cs < MAX_CS; cs++) { in ddr3_dfs_low_2_high()
1006 if (dram_info->cs_ena & (1 << cs)) { in ddr3_dfs_low_2_high()
1008 (cs << MR_CS_ADDR_OFFS)); in ddr3_dfs_low_2_high()
1010 reg |= odt_static[dram_info->cs_ena][cs]; in ddr3_dfs_low_2_high()
1012 (cs << MR_CS_ADDR_OFFS), reg); in ddr3_dfs_low_2_high()
1137 for (cs = 0; cs < MAX_CS; cs++) { in ddr3_dfs_low_2_high()
1138 if (dram_info->cs_ena & (1 << cs)) in ddr3_dfs_low_2_high()
1139 reg &= ~(1 << (REG_SDRAM_OPERATION_CS_OFFS + cs)); in ddr3_dfs_low_2_high()
1163 for (cs = 0; cs < MAX_CS; cs++) { in ddr3_dfs_low_2_high()
1164 if (dram_info->cs_ena & (1 << cs)) { in ddr3_dfs_low_2_high()
1167 (cs << MR_CS_ADDR_OFFS)) & in ddr3_dfs_low_2_high()
1176 (cs << MR_CS_ADDR_OFFS), reg); in ddr3_dfs_low_2_high()
1180 (cs << MR_CS_ADDR_OFFS)) & in ddr3_dfs_low_2_high()
1187 (cs << MR_CS_ADDR_OFFS), reg); in ddr3_dfs_low_2_high()
1201 u32 cs = 0; in ddr3_dfs_low_2_high()
1436 for (cs = 0; cs < MAX_CS; cs++) { in ddr3_dfs_low_2_high()
1437 if (dram_info->cs_ena & (1 << cs)) { in ddr3_dfs_low_2_high()
1445 ~(1 << (REG_SDRAM_OPERATION_CS_OFFS + cs)); in ddr3_dfs_low_2_high()
1462 ~(1 << (REG_SDRAM_OPERATION_CS_OFFS + cs)); in ddr3_dfs_low_2_high()
1486 ~(1 << (REG_SDRAM_OPERATION_CS_OFFS + cs)); in ddr3_dfs_low_2_high()
1500 ~(1 << (REG_SDRAM_OPERATION_CS_OFFS + cs)); in ddr3_dfs_low_2_high()
1510 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_dfs_low_2_high()
1512 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_dfs_low_2_high()
1518 (REG_READ_DATA_READY_DELAYS_OFFS * cs)); in ddr3_dfs_low_2_high()
1520 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_dfs_low_2_high()