Lines Matching refs:dram_info
113 int ddr3_dfs_high_2_low(u32 freq, MV_DRAM_INFO *dram_info) in ddr3_dfs_high_2_low() argument
154 if (dram_info->reg_dimm) { in ddr3_dfs_high_2_low()
197 if (dram_info->cs_ena & (1 << cs)) { in ddr3_dfs_high_2_low()
394 if (dram_info->reg_dimm) { in ddr3_dfs_high_2_low()
443 if (dram_info->cs_ena & (1 << cs)) in ddr3_dfs_high_2_low()
469 if (dram_info->cs_ena & (1 << cs)) { in ddr3_dfs_high_2_low()
677 if (dram_info->cs_ena & (1 << cs)) { in ddr3_dfs_high_2_low()
769 int ddr3_dfs_low_2_high(u32 freq, int ratio_2to1, MV_DRAM_INFO *dram_info) in ddr3_dfs_low_2_high() argument
972 reg |= ((dram_info->mode_2t & REG_DUNIT_CTRL_LOW_2T_MASK) << in ddr3_dfs_low_2_high()
983 if (dram_info->target_frequency == 0x8) in ddr3_dfs_low_2_high()
988 tmp = ddr3_cl_to_valid_cl(dram_info->cl); in ddr3_dfs_low_2_high()
999 reg |= (((dram_info->cwl) & REG_DFS_CWL_NEXT_STATE_MASK) << in ddr3_dfs_low_2_high()
1006 if (dram_info->cs_ena & (1 << cs)) { in ddr3_dfs_low_2_high()
1010 reg |= odt_static[dram_info->cs_ena][cs]; in ddr3_dfs_low_2_high()
1068 if (dram_info->reg_dimm) { in ddr3_dfs_low_2_high()
1138 if (dram_info->cs_ena & (1 << cs)) in ddr3_dfs_low_2_high()
1164 if (dram_info->cs_ena & (1 << cs)) { in ddr3_dfs_low_2_high()
1172 tmp = ddr3_cl_to_valid_cl(dram_info->cl); in ddr3_dfs_low_2_high()
1185 reg |= ((dram_info->cwl) << REG_DDR3_MR2_CWL_OFFS); in ddr3_dfs_low_2_high()
1430 reg |= ((dram_info->mode_2t & REG_DUNIT_CTRL_LOW_2T_MASK) << in ddr3_dfs_low_2_high()
1437 if (dram_info->cs_ena & (1 << cs)) { in ddr3_dfs_low_2_high()
1479 tmp = ddr3_cl_to_valid_cl(dram_info->cl) & 0xF; in ddr3_dfs_low_2_high()
1497 reg |= dram_info->cwl << REG_DDR3_MR2_CWL_OFFS; in ddr3_dfs_low_2_high()
1511 reg |= (dram_info->cl << in ddr3_dfs_low_2_high()
1519 reg |= ((dram_info->cl + 1) << in ddr3_dfs_low_2_high()