Lines Matching refs:dimm_num
184 static u32 ddr3_get_max_val(u32 spd_val, u32 dimm_num, u32 static_val);
185 static u32 ddr3_get_min_val(u32 spd_val, u32 dimm_num, u32 static_val);
206 u32 dimm_num = 0; in ddr3_get_dimm_num() local
215 if ((dimm_num == 0) && (dimm_cur_addr < FAR_END_DIMM_ADDR)) in ddr3_get_dimm_num()
221 dimm_addr[dimm_num] = dimm_cur_addr; in ddr3_get_dimm_num()
222 dimm_num++; in ddr3_get_dimm_num()
227 return dimm_num; in ddr3_get_dimm_num()
582 u32 dimm_num = 0; local
602 dimm_num = 1;
612 dimm_num = ddr3_get_dimm_num(dimm_addr);
613 if (dimm_num == 0) {
622 dimm_num, 1);
625 for (dimm = 0; dimm < dimm_num; dimm++) {
643 for (dimm = 0; dimm < dimm_num; dimm++)
660 if (dimm_num) {
674 if (dimm == dimm_num)
702 dimm_num, ddr3_valid_cl_to_cl(reg));
715 if (ecc_ena && ddr3_get_min_val(sum_info.err_check_type, dimm_num,
737 if (ddr3_get_min_val(sum_info.data_width, dimm_num, BUS_WIDTH) == 64) {
761 dimm_num, stat_val);
793 tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
802 tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
810 tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
818 tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
826 tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
834 tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
842 tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
859 tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
874 tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
883 tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
1262 u32 ddr3_get_max_val(u32 spd_val, u32 dimm_num, u32 static_val) argument
1265 if (dimm_num > 0) {
1285 u32 ddr3_get_min_val(u32 spd_val, u32 dimm_num, u32 static_val) argument
1288 if (dimm_num > 0) {