Lines Matching refs:at91_port
23 static struct at91_port *at91_pio_get_port(unsigned port) in at91_pio_get_port()
27 return (struct at91_port *)ATMEL_BASE_PIOA; in at91_pio_get_port()
29 return (struct at91_port *)ATMEL_BASE_PIOB; in at91_pio_get_port()
31 return (struct at91_port *)ATMEL_BASE_PIOC; in at91_pio_get_port()
34 return (struct at91_port *)ATMEL_BASE_PIOD; in at91_pio_get_port()
37 return (struct at91_port *)ATMEL_BASE_PIOE; in at91_pio_get_port()
46 static void at91_set_port_pullup(struct at91_port *at91_port, unsigned offset, in at91_set_port_pullup() argument
53 writel(mask, &at91_port->puer); in at91_set_port_pullup()
55 writel(mask, &at91_port->pudr); in at91_set_port_pullup()
56 writel(mask, &at91_port->per); in at91_set_port_pullup()
61 struct at91_port *at91_port = at91_pio_get_port(port); in at91_set_pio_pullup() local
63 if (at91_port && (pin < GPIO_PER_BANK)) in at91_set_pio_pullup()
64 at91_set_port_pullup(at91_port, pin, use_pullup); in at91_set_pio_pullup()
74 struct at91_port *at91_port = at91_pio_get_port(port); in at91_set_pio_periph() local
77 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_set_pio_periph()
79 writel(mask, &at91_port->idr); in at91_set_pio_periph()
81 writel(mask, &at91_port->per); in at91_set_pio_periph()
92 struct at91_port *at91_port = at91_pio_get_port(port); in at91_set_a_periph() local
95 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_set_a_periph()
97 writel(mask, &at91_port->idr); in at91_set_a_periph()
99 writel(mask, &at91_port->mux.pio2.asr); in at91_set_a_periph()
100 writel(mask, &at91_port->pdr); in at91_set_a_periph()
111 struct at91_port *at91_port = at91_pio_get_port(port); in at91_set_b_periph() local
114 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_set_b_periph()
116 writel(mask, &at91_port->idr); in at91_set_b_periph()
118 writel(mask, &at91_port->mux.pio2.bsr); in at91_set_b_periph()
119 writel(mask, &at91_port->pdr); in at91_set_b_periph()
130 struct at91_port *at91_port = at91_pio_get_port(port); in at91_pio3_set_a_periph() local
133 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_pio3_set_a_periph()
135 writel(mask, &at91_port->idr); in at91_pio3_set_a_periph()
137 writel(readl(&at91_port->mux.pio3.abcdsr1) & ~mask, in at91_pio3_set_a_periph()
138 &at91_port->mux.pio3.abcdsr1); in at91_pio3_set_a_periph()
139 writel(readl(&at91_port->mux.pio3.abcdsr2) & ~mask, in at91_pio3_set_a_periph()
140 &at91_port->mux.pio3.abcdsr2); in at91_pio3_set_a_periph()
142 writel(mask, &at91_port->pdr); in at91_pio3_set_a_periph()
153 struct at91_port *at91_port = at91_pio_get_port(port); in at91_pio3_set_b_periph() local
156 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_pio3_set_b_periph()
158 writel(mask, &at91_port->idr); in at91_pio3_set_b_periph()
160 writel(readl(&at91_port->mux.pio3.abcdsr1) | mask, in at91_pio3_set_b_periph()
161 &at91_port->mux.pio3.abcdsr1); in at91_pio3_set_b_periph()
162 writel(readl(&at91_port->mux.pio3.abcdsr2) & ~mask, in at91_pio3_set_b_periph()
163 &at91_port->mux.pio3.abcdsr2); in at91_pio3_set_b_periph()
165 writel(mask, &at91_port->pdr); in at91_pio3_set_b_periph()
175 struct at91_port *at91_port = at91_pio_get_port(port); in at91_pio3_set_c_periph() local
178 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_pio3_set_c_periph()
180 writel(mask, &at91_port->idr); in at91_pio3_set_c_periph()
182 writel(readl(&at91_port->mux.pio3.abcdsr1) & ~mask, in at91_pio3_set_c_periph()
183 &at91_port->mux.pio3.abcdsr1); in at91_pio3_set_c_periph()
184 writel(readl(&at91_port->mux.pio3.abcdsr2) | mask, in at91_pio3_set_c_periph()
185 &at91_port->mux.pio3.abcdsr2); in at91_pio3_set_c_periph()
186 writel(mask, &at91_port->pdr); in at91_pio3_set_c_periph()
197 struct at91_port *at91_port = at91_pio_get_port(port); in at91_pio3_set_d_periph() local
200 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_pio3_set_d_periph()
202 writel(mask, &at91_port->idr); in at91_pio3_set_d_periph()
204 writel(readl(&at91_port->mux.pio3.abcdsr1) | mask, in at91_pio3_set_d_periph()
205 &at91_port->mux.pio3.abcdsr1); in at91_pio3_set_d_periph()
206 writel(readl(&at91_port->mux.pio3.abcdsr2) | mask, in at91_pio3_set_d_periph()
207 &at91_port->mux.pio3.abcdsr2); in at91_pio3_set_d_periph()
208 writel(mask, &at91_port->pdr); in at91_pio3_set_d_periph()
215 static bool at91_get_port_output(struct at91_port *at91_port, int offset) in at91_get_port_output() argument
220 val = readl(&at91_port->osr); in at91_get_port_output()
225 static void at91_set_port_input(struct at91_port *at91_port, int offset, in at91_set_port_input() argument
231 writel(mask, &at91_port->idr); in at91_set_port_input()
232 at91_set_port_pullup(at91_port, offset, use_pullup); in at91_set_port_input()
233 writel(mask, &at91_port->odr); in at91_set_port_input()
234 writel(mask, &at91_port->per); in at91_set_port_input()
243 struct at91_port *at91_port = at91_pio_get_port(port); in at91_set_pio_input() local
245 if (at91_port && (pin < GPIO_PER_BANK)) in at91_set_pio_input()
246 at91_set_port_input(at91_port, pin, use_pullup); in at91_set_pio_input()
251 static void at91_set_port_output(struct at91_port *at91_port, int offset, in at91_set_port_output() argument
257 writel(mask, &at91_port->idr); in at91_set_port_output()
258 writel(mask, &at91_port->pudr); in at91_set_port_output()
260 writel(mask, &at91_port->sodr); in at91_set_port_output()
262 writel(mask, &at91_port->codr); in at91_set_port_output()
263 writel(mask, &at91_port->oer); in at91_set_port_output()
264 writel(mask, &at91_port->per); in at91_set_port_output()
273 struct at91_port *at91_port = at91_pio_get_port(port); in at91_set_pio_output() local
275 if (at91_port && (pin < GPIO_PER_BANK)) in at91_set_pio_output()
276 at91_set_port_output(at91_port, pin, value); in at91_set_pio_output()
286 struct at91_port *at91_port = at91_pio_get_port(port); in at91_set_pio_deglitch() local
289 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_set_pio_deglitch()
292 writel(mask, &at91_port->ifer); in at91_set_pio_deglitch()
294 writel(mask, &at91_port->ifdr); in at91_set_pio_deglitch()
305 struct at91_port *at91_port = at91_pio_get_port(port); in at91_pio3_set_pio_deglitch() local
308 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_pio3_set_pio_deglitch()
311 writel(mask, &at91_port->mux.pio3.ifscdr); in at91_pio3_set_pio_deglitch()
312 writel(mask, &at91_port->ifer); in at91_pio3_set_pio_deglitch()
314 writel(mask, &at91_port->ifdr); in at91_pio3_set_pio_deglitch()
326 struct at91_port *at91_port = at91_pio_get_port(port); in at91_pio3_set_pio_debounce() local
329 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_pio3_set_pio_debounce()
332 writel(mask, &at91_port->mux.pio3.ifscer); in at91_pio3_set_pio_debounce()
333 writel(div & PIO_SCDR_DIV, &at91_port->mux.pio3.scdr); in at91_pio3_set_pio_debounce()
334 writel(mask, &at91_port->ifer); in at91_pio3_set_pio_debounce()
336 writel(mask, &at91_port->ifdr); in at91_pio3_set_pio_debounce()
349 struct at91_port *at91_port = at91_pio_get_port(port); in at91_pio3_set_pio_pulldown() local
352 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_pio3_set_pio_pulldown()
356 writel(mask, &at91_port->mux.pio3.ppder); in at91_pio3_set_pio_pulldown()
358 writel(mask, &at91_port->mux.pio3.ppddr); in at91_pio3_set_pio_pulldown()
366 struct at91_port *at91_port = at91_pio_get_port(port); in at91_pio3_set_pio_pullup() local
371 if (at91_port && (pin < GPIO_PER_BANK)) in at91_pio3_set_pio_pullup()
372 at91_set_port_pullup(at91_port, pin, use_pullup); in at91_pio3_set_pio_pullup()
382 struct at91_port *at91_port = at91_pio_get_port(port); in at91_pio3_set_pio_disable_schmitt_trig() local
385 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_pio3_set_pio_disable_schmitt_trig()
387 writel(readl(&at91_port->schmitt) | mask, in at91_pio3_set_pio_disable_schmitt_trig()
388 &at91_port->schmitt); in at91_pio3_set_pio_disable_schmitt_trig()
400 struct at91_port *at91_port = at91_pio_get_port(port); in at91_set_pio_multi_drive() local
403 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_set_pio_multi_drive()
406 writel(mask, &at91_port->mder); in at91_set_pio_multi_drive()
408 writel(mask, &at91_port->mddr); in at91_set_pio_multi_drive()
414 static void at91_set_port_value(struct at91_port *at91_port, int offset, in at91_set_port_value() argument
421 writel(mask, &at91_port->sodr); in at91_set_port_value()
423 writel(mask, &at91_port->codr); in at91_set_port_value()
431 struct at91_port *at91_port = at91_pio_get_port(port); in at91_set_pio_value() local
433 if (at91_port && (pin < GPIO_PER_BANK)) in at91_set_pio_value()
434 at91_set_port_value(at91_port, pin, value); in at91_set_pio_value()
439 static int at91_get_port_value(struct at91_port *at91_port, int offset) in at91_get_port_value() argument
444 pdsr = readl(&at91_port->pdsr) & mask; in at91_get_port_value()
453 struct at91_port *at91_port = at91_pio_get_port(port); in at91_get_pio_value() local
455 if (at91_port && (pin < GPIO_PER_BANK)) in at91_get_pio_value()
456 return at91_get_port_value(at91_port, pin); in at91_get_pio_value()
506 struct at91_port *regs;
612 port->regs = (struct at91_port *)plat->base_addr; in at91_gpio_probe()