Lines Matching refs:mask
49 u32 mask; in at91_set_port_pullup() local
51 mask = 1 << offset; in at91_set_port_pullup()
53 writel(mask, &at91_port->puer); in at91_set_port_pullup()
55 writel(mask, &at91_port->pudr); in at91_set_port_pullup()
56 writel(mask, &at91_port->per); in at91_set_port_pullup()
75 u32 mask; in at91_set_pio_periph() local
78 mask = 1 << pin; in at91_set_pio_periph()
79 writel(mask, &at91_port->idr); in at91_set_pio_periph()
81 writel(mask, &at91_port->per); in at91_set_pio_periph()
93 u32 mask; in at91_set_a_periph() local
96 mask = 1 << pin; in at91_set_a_periph()
97 writel(mask, &at91_port->idr); in at91_set_a_periph()
99 writel(mask, &at91_port->mux.pio2.asr); in at91_set_a_periph()
100 writel(mask, &at91_port->pdr); in at91_set_a_periph()
112 u32 mask; in at91_set_b_periph() local
115 mask = 1 << pin; in at91_set_b_periph()
116 writel(mask, &at91_port->idr); in at91_set_b_periph()
118 writel(mask, &at91_port->mux.pio2.bsr); in at91_set_b_periph()
119 writel(mask, &at91_port->pdr); in at91_set_b_periph()
131 u32 mask; in at91_pio3_set_a_periph() local
134 mask = 1 << pin; in at91_pio3_set_a_periph()
135 writel(mask, &at91_port->idr); in at91_pio3_set_a_periph()
137 writel(readl(&at91_port->mux.pio3.abcdsr1) & ~mask, in at91_pio3_set_a_periph()
139 writel(readl(&at91_port->mux.pio3.abcdsr2) & ~mask, in at91_pio3_set_a_periph()
142 writel(mask, &at91_port->pdr); in at91_pio3_set_a_periph()
154 u32 mask; in at91_pio3_set_b_periph() local
157 mask = 1 << pin; in at91_pio3_set_b_periph()
158 writel(mask, &at91_port->idr); in at91_pio3_set_b_periph()
160 writel(readl(&at91_port->mux.pio3.abcdsr1) | mask, in at91_pio3_set_b_periph()
162 writel(readl(&at91_port->mux.pio3.abcdsr2) & ~mask, in at91_pio3_set_b_periph()
165 writel(mask, &at91_port->pdr); in at91_pio3_set_b_periph()
176 u32 mask; in at91_pio3_set_c_periph() local
179 mask = 1 << pin; in at91_pio3_set_c_periph()
180 writel(mask, &at91_port->idr); in at91_pio3_set_c_periph()
182 writel(readl(&at91_port->mux.pio3.abcdsr1) & ~mask, in at91_pio3_set_c_periph()
184 writel(readl(&at91_port->mux.pio3.abcdsr2) | mask, in at91_pio3_set_c_periph()
186 writel(mask, &at91_port->pdr); in at91_pio3_set_c_periph()
198 u32 mask; in at91_pio3_set_d_periph() local
201 mask = 1 << pin; in at91_pio3_set_d_periph()
202 writel(mask, &at91_port->idr); in at91_pio3_set_d_periph()
204 writel(readl(&at91_port->mux.pio3.abcdsr1) | mask, in at91_pio3_set_d_periph()
206 writel(readl(&at91_port->mux.pio3.abcdsr2) | mask, in at91_pio3_set_d_periph()
208 writel(mask, &at91_port->pdr); in at91_pio3_set_d_periph()
217 u32 mask, val; in at91_get_port_output() local
219 mask = 1 << offset; in at91_get_port_output()
221 return val & mask; in at91_get_port_output()
228 u32 mask; in at91_set_port_input() local
230 mask = 1 << offset; in at91_set_port_input()
231 writel(mask, &at91_port->idr); in at91_set_port_input()
233 writel(mask, &at91_port->odr); in at91_set_port_input()
234 writel(mask, &at91_port->per); in at91_set_port_input()
254 u32 mask; in at91_set_port_output() local
256 mask = 1 << offset; in at91_set_port_output()
257 writel(mask, &at91_port->idr); in at91_set_port_output()
258 writel(mask, &at91_port->pudr); in at91_set_port_output()
260 writel(mask, &at91_port->sodr); in at91_set_port_output()
262 writel(mask, &at91_port->codr); in at91_set_port_output()
263 writel(mask, &at91_port->oer); in at91_set_port_output()
264 writel(mask, &at91_port->per); in at91_set_port_output()
287 u32 mask; in at91_set_pio_deglitch() local
290 mask = 1 << pin; in at91_set_pio_deglitch()
292 writel(mask, &at91_port->ifer); in at91_set_pio_deglitch()
294 writel(mask, &at91_port->ifdr); in at91_set_pio_deglitch()
306 u32 mask; in at91_pio3_set_pio_deglitch() local
309 mask = 1 << pin; in at91_pio3_set_pio_deglitch()
311 writel(mask, &at91_port->mux.pio3.ifscdr); in at91_pio3_set_pio_deglitch()
312 writel(mask, &at91_port->ifer); in at91_pio3_set_pio_deglitch()
314 writel(mask, &at91_port->ifdr); in at91_pio3_set_pio_deglitch()
327 u32 mask; in at91_pio3_set_pio_debounce() local
330 mask = 1 << pin; in at91_pio3_set_pio_debounce()
332 writel(mask, &at91_port->mux.pio3.ifscer); in at91_pio3_set_pio_debounce()
334 writel(mask, &at91_port->ifer); in at91_pio3_set_pio_debounce()
336 writel(mask, &at91_port->ifdr); in at91_pio3_set_pio_debounce()
350 u32 mask; in at91_pio3_set_pio_pulldown() local
353 mask = 1 << pin; in at91_pio3_set_pio_pulldown()
356 writel(mask, &at91_port->mux.pio3.ppder); in at91_pio3_set_pio_pulldown()
358 writel(mask, &at91_port->mux.pio3.ppddr); in at91_pio3_set_pio_pulldown()
383 u32 mask; in at91_pio3_set_pio_disable_schmitt_trig() local
386 mask = 1 << pin; in at91_pio3_set_pio_disable_schmitt_trig()
387 writel(readl(&at91_port->schmitt) | mask, in at91_pio3_set_pio_disable_schmitt_trig()
401 u32 mask; in at91_set_pio_multi_drive() local
404 mask = 1 << pin; in at91_set_pio_multi_drive()
406 writel(mask, &at91_port->mder); in at91_set_pio_multi_drive()
408 writel(mask, &at91_port->mddr); in at91_set_pio_multi_drive()
417 u32 mask; in at91_set_port_value() local
419 mask = 1 << offset; in at91_set_port_value()
421 writel(mask, &at91_port->sodr); in at91_set_port_value()
423 writel(mask, &at91_port->codr); in at91_set_port_value()
441 u32 pdsr = 0, mask; in at91_get_port_value() local
443 mask = 1 << offset; in at91_get_port_value()
444 pdsr = readl(&at91_port->pdsr) & mask; in at91_get_port_value()