Lines Matching refs:host
24 static int dwmci_wait_reset(struct dwmci_host *host, u32 value) in dwmci_wait_reset() argument
29 dwmci_writel(host, DWMCI_CTRL, value); in dwmci_wait_reset()
32 ctrl = dwmci_readl(host, DWMCI_CTRL); in dwmci_wait_reset()
50 static void dwmci_prepare_data(struct dwmci_host *host, in dwmci_prepare_data() argument
62 dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET); in dwmci_prepare_data()
65 dwmci_writel(host, DWMCI_IDSTS, 0xFFFFFFFF); in dwmci_prepare_data()
68 dwmci_writel(host, DWMCI_DBADDR, (ulong)cur_idmac); in dwmci_prepare_data()
92 ctrl = dwmci_readl(host, DWMCI_CTRL); in dwmci_prepare_data()
94 dwmci_writel(host, DWMCI_CTRL, ctrl); in dwmci_prepare_data()
96 ctrl = dwmci_readl(host, DWMCI_BMOD); in dwmci_prepare_data()
98 dwmci_writel(host, DWMCI_BMOD, ctrl); in dwmci_prepare_data()
100 dwmci_writel(host, DWMCI_BLKSIZ, data->blocksize); in dwmci_prepare_data()
101 dwmci_writel(host, DWMCI_BYTCNT, data->blocksize * data->blocks); in dwmci_prepare_data()
104 static int dwmci_fifo_ready(struct dwmci_host *host, u32 bit, u32 *len) in dwmci_fifo_ready() argument
108 *len = dwmci_readl(host, DWMCI_STATUS); in dwmci_fifo_ready()
111 *len = dwmci_readl(host, DWMCI_STATUS); in dwmci_fifo_ready()
137 static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) in dwmci_data_transfer() argument
139 struct mmc *mmc = host->mmc; in dwmci_data_transfer()
144 u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >> in dwmci_data_transfer()
158 mask = dwmci_readl(host, DWMCI_RINTSTS); in dwmci_data_transfer()
166 if (host->fifo_mode && size) { in dwmci_data_transfer()
171 ret = dwmci_fifo_ready(host, in dwmci_data_transfer()
182 dwmci_readl(host, DWMCI_DATA); in dwmci_data_transfer()
185 dwmci_writel(host, DWMCI_RINTSTS, in dwmci_data_transfer()
190 ret = dwmci_fifo_ready(host, in dwmci_data_transfer()
201 dwmci_writel(host, DWMCI_DATA, in dwmci_data_transfer()
205 dwmci_writel(host, DWMCI_RINTSTS, in dwmci_data_transfer()
225 dwmci_writel(host, DWMCI_RINTSTS, mask); in dwmci_data_transfer()
230 static int dwmci_set_transfer_mode(struct dwmci_host *host, in dwmci_set_transfer_mode() argument
252 struct dwmci_host *host = mmc->priv; local
262 while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) {
269 dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
272 if (host->fifo_mode) {
273 dwmci_writel(host, DWMCI_BLKSIZ, data->blocksize);
274 dwmci_writel(host, DWMCI_BYTCNT,
276 dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET);
293 dwmci_prepare_data(host, data, cur_idmac,
298 dwmci_writel(host, DWMCI_CMDARG, cmd->cmdarg);
301 flags = dwmci_set_transfer_mode(host, data);
324 dwmci_writel(host, DWMCI_CMD, flags);
327 mask = dwmci_readl(host, DWMCI_RINTSTS);
330 dwmci_writel(host, DWMCI_RINTSTS, mask);
363 cmd->response[0] = dwmci_readl(host, DWMCI_RESP3);
364 cmd->response[1] = dwmci_readl(host, DWMCI_RESP2);
365 cmd->response[2] = dwmci_readl(host, DWMCI_RESP1);
366 cmd->response[3] = dwmci_readl(host, DWMCI_RESP0);
368 cmd->response[0] = dwmci_readl(host, DWMCI_RESP0);
373 ret = dwmci_data_transfer(host, data);
376 if (!host->fifo_mode) {
381 ret = wait_for_bit_le32(host->ioaddr + DWMCI_IDSTS,
387 dwmci_writel(host, DWMCI_IDSTS, DWMCI_IDINTEN_MASK);
389 ctrl = dwmci_readl(host, DWMCI_CTRL);
391 dwmci_writel(host, DWMCI_CTRL, ctrl);
401 static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) argument
407 if ((freq == host->clock) || (freq == 0))
414 if (host->get_mmc_clk)
415 sclk = host->get_mmc_clk(host, freq);
416 else if (host->bus_hz)
417 sclk = host->bus_hz;
428 dwmci_writel(host, DWMCI_CLKENA, 0);
429 dwmci_writel(host, DWMCI_CLKSRC, 0);
431 dwmci_writel(host, DWMCI_CLKDIV, div);
432 dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
436 status = dwmci_readl(host, DWMCI_CMD);
443 dwmci_writel(host, DWMCI_CLKENA, DWMCI_CLKEN_ENABLE |
446 dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
451 status = dwmci_readl(host, DWMCI_CMD);
458 host->clock = freq;
471 struct dwmci_host *host = (struct dwmci_host *)mmc->priv; local
476 dwmci_setup_bus(host, mmc->clock);
489 dwmci_writel(host, DWMCI_CTYPE, ctype);
491 regs = dwmci_readl(host, DWMCI_UHS_REG);
497 dwmci_writel(host, DWMCI_UHS_REG, regs);
499 if (host->clksel) {
502 ret = host->clksel(host);
527 struct dwmci_host *host = mmc->priv; local
529 if (host->board_init)
530 host->board_init(host);
532 dwmci_writel(host, DWMCI_PWREN, 1);
534 if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) {
540 dwmci_setup_bus(host, mmc->cfg->f_min);
542 dwmci_writel(host, DWMCI_RINTSTS, 0xFFFFFFFF);
543 dwmci_writel(host, DWMCI_INTMASK, 0);
545 dwmci_writel(host, DWMCI_TMOUT, 0xFFFFFFFF);
547 dwmci_writel(host, DWMCI_IDINTEN, 0);
548 dwmci_writel(host, DWMCI_BMOD, 1);
550 if (!host->fifoth_val) {
553 fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
555 host->fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) |
558 dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val);
560 dwmci_writel(host, DWMCI_CLKENA, 0);
561 dwmci_writel(host, DWMCI_CLKSRC, 0);
563 if (!host->fifo_mode)
564 dwmci_writel(host, DWMCI_IDINTEN, DWMCI_IDINTEN_MASK);
590 void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host, argument
593 cfg->name = host->name;
602 cfg->host_caps = host->caps;
604 if (host->buswidth == 8) {
622 int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk) argument
624 dwmci_setup_cfg(&host->cfg, host, max_clk, min_clk);
626 host->mmc = mmc_create(&host->cfg, host);
627 if (host->mmc == NULL)