Lines Matching refs:priv
109 static int rmobile_is_gen3_mmc0(struct tmio_sd_priv *priv) in rmobile_is_gen3_mmc0() argument
112 return (uintptr_t)(priv->regbase) == 0xee140000; in rmobile_is_gen3_mmc0()
115 static u32 sd_scc_tmpport_read32(struct tmio_sd_priv *priv, u32 addr) in sd_scc_tmpport_read32() argument
118 tmio_sd_writel(priv, RENESAS_SDHI_SCC_TMPPORT5_DLL_RW_SEL_R | in sd_scc_tmpport_read32()
123 tmio_sd_writel(priv, RENESAS_SDHI_SCC_TMPPORT4_DLL_ACC_START, in sd_scc_tmpport_read32()
125 tmio_sd_writel(priv, 0, RENESAS_SDHI_SCC_TMPPORT4); in sd_scc_tmpport_read32()
127 return tmio_sd_readl(priv, RENESAS_SDHI_SCC_TMPPORT7); in sd_scc_tmpport_read32()
130 static void sd_scc_tmpport_write32(struct tmio_sd_priv *priv, u32 addr, u32 val) in sd_scc_tmpport_write32() argument
133 tmio_sd_writel(priv, RENESAS_SDHI_SCC_TMPPORT5_DLL_RW_SEL_W | in sd_scc_tmpport_write32()
136 tmio_sd_writel(priv, val, RENESAS_SDHI_SCC_TMPPORT6); in sd_scc_tmpport_write32()
139 tmio_sd_writel(priv, RENESAS_SDHI_SCC_TMPPORT4_DLL_ACC_START, in sd_scc_tmpport_write32()
141 tmio_sd_writel(priv, 0, RENESAS_SDHI_SCC_TMPPORT4); in sd_scc_tmpport_write32()
146 struct tmio_sd_priv *priv = dev_get_priv(dev); in renesas_sdhi_check_scc_error() local
148 unsigned long new_tap = priv->tap_set; in renesas_sdhi_check_scc_error()
149 unsigned long error_tap = priv->tap_set; in renesas_sdhi_check_scc_error()
152 if ((priv->caps & TMIO_SD_CAP_RCAR_UHS) && in renesas_sdhi_check_scc_error()
156 (priv->nrtaps != 4)) in renesas_sdhi_check_scc_error()
159 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); in renesas_sdhi_check_scc_error()
162 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSREQ); in renesas_sdhi_check_scc_error()
164 tmio_sd_writel(priv, 0, RENESAS_SDHI_SCC_RVSREQ); in renesas_sdhi_check_scc_error()
172 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSREQ); in renesas_sdhi_check_scc_error()
176 tmio_sd_writel(priv, 0, RENESAS_SDHI_SCC_RVSREQ); in renesas_sdhi_check_scc_error()
184 smpcmp = tmio_sd_readl(priv, RENESAS_SDHI_SCC_SMPCMP) & in renesas_sdhi_check_scc_error()
191 new_tap = (priv->tap_set + in renesas_sdhi_check_scc_error()
192 priv->tap_num + 1) % priv->tap_num; in renesas_sdhi_check_scc_error()
193 error_tap = (priv->tap_set + in renesas_sdhi_check_scc_error()
194 priv->tap_num - 1) % priv->tap_num; in renesas_sdhi_check_scc_error()
197 new_tap = (priv->tap_set + in renesas_sdhi_check_scc_error()
198 priv->tap_num - 1) % priv->tap_num; in renesas_sdhi_check_scc_error()
199 error_tap = (priv->tap_set + in renesas_sdhi_check_scc_error()
200 priv->tap_num + 1) % priv->tap_num; in renesas_sdhi_check_scc_error()
206 if (priv->hs400_bad_tap & BIT(new_tap)) { in renesas_sdhi_check_scc_error()
213 if (priv->smpcmp & BIT(error_tap)) in renesas_sdhi_check_scc_error()
219 priv->tap_set = new_tap; in renesas_sdhi_check_scc_error()
224 priv->tap_set = (priv->tap_set + in renesas_sdhi_check_scc_error()
225 priv->tap_num + 1) % priv->tap_num; in renesas_sdhi_check_scc_error()
227 priv->tap_set = (priv->tap_set + in renesas_sdhi_check_scc_error()
228 priv->tap_num - 1) % priv->tap_num; in renesas_sdhi_check_scc_error()
234 tmio_sd_writel(priv, priv->tap_set >> ((priv->nrtaps == 4) ? 1 : 0), in renesas_sdhi_check_scc_error()
240 static void renesas_sdhi_adjust_hs400_mode_enable(struct tmio_sd_priv *priv) in renesas_sdhi_adjust_hs400_mode_enable() argument
244 if (!priv->adjust_hs400_enable) in renesas_sdhi_adjust_hs400_mode_enable()
247 if (!priv->needs_adjust_hs400) in renesas_sdhi_adjust_hs400_mode_enable()
250 if (!priv->adjust_hs400_calib_table) in renesas_sdhi_adjust_hs400_mode_enable()
267 sd_scc_tmpport_write32(priv, 0x00, in renesas_sdhi_adjust_hs400_mode_enable()
269 calib_code = sd_scc_tmpport_read32(priv, 0x26); in renesas_sdhi_adjust_hs400_mode_enable()
271 sd_scc_tmpport_write32(priv, 0x22, in renesas_sdhi_adjust_hs400_mode_enable()
273 priv->adjust_hs400_calib_table[calib_code]); in renesas_sdhi_adjust_hs400_mode_enable()
274 tmio_sd_writel(priv, priv->adjust_hs400_offset, in renesas_sdhi_adjust_hs400_mode_enable()
278 priv->needs_adjust_hs400 = false; in renesas_sdhi_adjust_hs400_mode_enable()
281 static void renesas_sdhi_adjust_hs400_mode_disable(struct tmio_sd_priv *priv) in renesas_sdhi_adjust_hs400_mode_disable() argument
292 sd_scc_tmpport_write32(priv, 0x00, in renesas_sdhi_adjust_hs400_mode_disable()
294 sd_scc_tmpport_write32(priv, 0x22, 0); in renesas_sdhi_adjust_hs400_mode_disable()
295 tmio_sd_writel(priv, 0, RENESAS_SDHI_SCC_TMPPORT3); in renesas_sdhi_adjust_hs400_mode_disable()
298 static unsigned int renesas_sdhi_init_tuning(struct tmio_sd_priv *priv) in renesas_sdhi_init_tuning() argument
303 tmio_sd_writel(priv, 0, TMIO_SD_INFO1); in renesas_sdhi_init_tuning()
305 reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL); in renesas_sdhi_init_tuning()
307 tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL); in renesas_sdhi_init_tuning()
310 tmio_sd_writel(priv, (0x8 << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) | in renesas_sdhi_init_tuning()
314 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_CKSEL); in renesas_sdhi_init_tuning()
316 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_CKSEL); in renesas_sdhi_init_tuning()
318 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); in renesas_sdhi_init_tuning()
320 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL); in renesas_sdhi_init_tuning()
322 tmio_sd_writel(priv, 0x300 /* scc_tappos */, in renesas_sdhi_init_tuning()
325 reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL); in renesas_sdhi_init_tuning()
327 tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL); in renesas_sdhi_init_tuning()
330 return (tmio_sd_readl(priv, RENESAS_SDHI_SCC_DTCNTL) >> in renesas_sdhi_init_tuning()
335 static void renesas_sdhi_reset_tuning(struct tmio_sd_priv *priv) in renesas_sdhi_reset_tuning() argument
340 reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL); in renesas_sdhi_reset_tuning()
342 tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL); in renesas_sdhi_reset_tuning()
344 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_CKSEL); in renesas_sdhi_reset_tuning()
346 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_CKSEL); in renesas_sdhi_reset_tuning()
348 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_TMPPORT2); in renesas_sdhi_reset_tuning()
351 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_TMPPORT2); in renesas_sdhi_reset_tuning()
354 renesas_sdhi_adjust_hs400_mode_disable(priv); in renesas_sdhi_reset_tuning()
356 reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL); in renesas_sdhi_reset_tuning()
358 tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL); in renesas_sdhi_reset_tuning()
360 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); in renesas_sdhi_reset_tuning()
362 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL); in renesas_sdhi_reset_tuning()
364 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); in renesas_sdhi_reset_tuning()
366 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL); in renesas_sdhi_reset_tuning()
371 struct tmio_sd_priv *priv = dev_get_priv(dev); in renesas_sdhi_hs400() local
374 int ret, taps = hs400 ? priv->nrtaps : 8; in renesas_sdhi_hs400()
379 ret = clk_set_rate(&priv->clk, 400000000); in renesas_sdhi_hs400()
381 ret = clk_set_rate(&priv->clk, 200000000); in renesas_sdhi_hs400()
385 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); in renesas_sdhi_hs400()
387 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL); in renesas_sdhi_hs400()
389 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_TMPPORT2); in renesas_sdhi_hs400()
398 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_TMPPORT2); in renesas_sdhi_hs400()
402 renesas_sdhi_adjust_hs400_mode_disable(priv); in renesas_sdhi_hs400()
404 tmio_sd_writel(priv, (0x8 << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) | in renesas_sdhi_hs400()
409 if (priv->hs400_bad_tap & BIT(priv->tap_set)) { in renesas_sdhi_hs400()
410 new_tap = (priv->tap_set + in renesas_sdhi_hs400()
411 priv->tap_num + 1) % priv->tap_num; in renesas_sdhi_hs400()
413 if (priv->hs400_bad_tap & BIT(new_tap)) in renesas_sdhi_hs400()
414 new_tap = (priv->tap_set + in renesas_sdhi_hs400()
415 priv->tap_num - 1) % priv->tap_num; in renesas_sdhi_hs400()
417 if (priv->hs400_bad_tap & BIT(new_tap)) { in renesas_sdhi_hs400()
418 new_tap = priv->tap_set; in renesas_sdhi_hs400()
422 priv->tap_set = new_tap; in renesas_sdhi_hs400()
423 tmio_sd_writel(priv, priv->tap_set, RENESAS_SDHI_SCC_TAPSET); in renesas_sdhi_hs400()
427 tmio_sd_writel(priv, priv->tap_set >> 1, in renesas_sdhi_hs400()
429 tmio_sd_writel(priv, hs400 ? 0x100 : 0x300, in renesas_sdhi_hs400()
432 tmio_sd_writel(priv, priv->tap_set, RENESAS_SDHI_SCC_TAPSET); in renesas_sdhi_hs400()
433 tmio_sd_writel(priv, 0x300, RENESAS_SDHI_SCC_DT2FF); in renesas_sdhi_hs400()
436 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_CKSEL); in renesas_sdhi_hs400()
438 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_CKSEL); in renesas_sdhi_hs400()
442 priv->needs_adjust_hs400 = true; in renesas_sdhi_hs400()
447 static void renesas_sdhi_prepare_tuning(struct tmio_sd_priv *priv, in renesas_sdhi_prepare_tuning() argument
451 tmio_sd_writel(priv, tap, RENESAS_SDHI_SCC_TAPSET); in renesas_sdhi_prepare_tuning()
454 static unsigned int renesas_sdhi_compare_scc_data(struct tmio_sd_priv *priv) in renesas_sdhi_compare_scc_data() argument
457 return tmio_sd_readl(priv, RENESAS_SDHI_SCC_SMPCMP); in renesas_sdhi_compare_scc_data()
460 static int renesas_sdhi_select_tuning(struct tmio_sd_priv *priv, in renesas_sdhi_select_tuning() argument
472 priv->needs_adjust_hs400 = false; in renesas_sdhi_select_tuning()
475 tmio_sd_writel(priv, 0, RENESAS_SDHI_SCC_RVSREQ); in renesas_sdhi_select_tuning()
478 for (i = 0; i < priv->tap_num * 2; i++) { in renesas_sdhi_select_tuning()
480 taps &= ~BIT(i % priv->tap_num); in renesas_sdhi_select_tuning()
481 taps &= ~BIT((i % priv->tap_num) + priv->tap_num); in renesas_sdhi_select_tuning()
483 if (!(priv->smpcmp & BIT(i))) { in renesas_sdhi_select_tuning()
484 priv->smpcmp &= ~BIT(i % priv->tap_num); in renesas_sdhi_select_tuning()
485 priv->smpcmp &= ~BIT((i % priv->tap_num) + priv->tap_num); in renesas_sdhi_select_tuning()
498 for (i = 0; i < priv->tap_num * 2; i++) { in renesas_sdhi_select_tuning()
521 if (tap_cnt == priv->tap_num * 2) { in renesas_sdhi_select_tuning()
526 for (i = 0; i < priv->tap_num * 2; i++) { in renesas_sdhi_select_tuning()
527 if (priv->smpcmp & BIT(i)) in renesas_sdhi_select_tuning()
549 priv->tap_set = ((tap_start + tap_end) / 2) % priv->tap_num; in renesas_sdhi_select_tuning()
554 tmio_sd_writel(priv, priv->tap_set, RENESAS_SDHI_SCC_TAPSET); in renesas_sdhi_select_tuning()
557 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); in renesas_sdhi_select_tuning()
559 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL); in renesas_sdhi_select_tuning()
566 struct tmio_sd_priv *priv = dev_get_priv(dev); in renesas_sdhi_execute_tuning() local
575 if (!(priv->caps & TMIO_SD_CAP_RCAR_UHS)) in renesas_sdhi_execute_tuning()
585 tap_num = renesas_sdhi_init_tuning(priv); in renesas_sdhi_execute_tuning()
590 priv->tap_num = tap_num; in renesas_sdhi_execute_tuning()
592 if (priv->tap_num * 2 >= sizeof(taps) * 8) { in renesas_sdhi_execute_tuning()
598 priv->smpcmp = 0; in renesas_sdhi_execute_tuning()
601 for (i = 0; i < 2 * priv->tap_num; i++) { in renesas_sdhi_execute_tuning()
602 renesas_sdhi_prepare_tuning(priv, i % priv->tap_num); in renesas_sdhi_execute_tuning()
605 caps = priv->caps; in renesas_sdhi_execute_tuning()
606 priv->caps &= ~TMIO_SD_CAP_DMA_INTERNAL; in renesas_sdhi_execute_tuning()
610 priv->caps = caps; in renesas_sdhi_execute_tuning()
615 ret = renesas_sdhi_compare_scc_data(priv); in renesas_sdhi_execute_tuning()
617 priv->smpcmp |= BIT(i); in renesas_sdhi_execute_tuning()
622 ret = renesas_sdhi_select_tuning(priv, taps); in renesas_sdhi_execute_tuning()
627 renesas_sdhi_reset_tuning(priv); in renesas_sdhi_execute_tuning()
641 struct tmio_sd_priv *priv = dev_get_priv(dev); in renesas_sdhi_set_ios() local
646 tmp = tmio_sd_readl(priv, TMIO_SD_CLKCTL); in renesas_sdhi_set_ios()
648 tmio_sd_writel(priv, tmp, TMIO_SD_CLKCTL); in renesas_sdhi_set_ios()
662 if ((priv->caps & TMIO_SD_CAP_RCAR_UHS) && in renesas_sdhi_set_ios()
666 renesas_sdhi_reset_tuning(priv); in renesas_sdhi_set_ios()
680 struct tmio_sd_priv *priv = dev_get_priv(dev); in renesas_sdhi_wait_dat0() local
684 dat0_high = !!(tmio_sd_readl(priv, TMIO_SD_INFO2) & TMIO_SD_INFO2_DAT0); in renesas_sdhi_wait_dat0()
790 struct tmio_sd_priv *priv = dev_get_priv(dev); in renesas_sdhi_send_cmd() local
795 renesas_sdhi_adjust_hs400_mode_enable(priv); in renesas_sdhi_send_cmd()
803 struct tmio_sd_priv *priv = dev_get_priv(dev); in renesas_sdhi_get_b_max() local
810 if (priv->quirks & TMIO_SD_CAP_16BIT) in renesas_sdhi_get_b_max()
854 static ulong renesas_sdhi_clk_get_rate(struct tmio_sd_priv *priv) in renesas_sdhi_clk_get_rate() argument
856 return clk_get_rate(&priv->clk); in renesas_sdhi_clk_get_rate()
861 struct tmio_sd_priv *priv = dev_get_priv(dev); in renesas_sdhi_filter_caps() local
863 if (!(priv->caps & TMIO_SD_CAP_RCAR_GEN3)) in renesas_sdhi_filter_caps()
866 if (priv->caps & TMIO_SD_CAP_DMA_INTERNAL) in renesas_sdhi_filter_caps()
867 priv->idma_bus_width = TMIO_SD_DMA_MODE_BUS_WIDTH; in renesas_sdhi_filter_caps()
889 priv->hs400_bad_tap = BIT(2) | BIT(3) | BIT(6) | BIT(7); in renesas_sdhi_filter_caps()
894 priv->adjust_hs400_enable = true; in renesas_sdhi_filter_caps()
895 priv->adjust_hs400_offset = 0; in renesas_sdhi_filter_caps()
896 priv->adjust_hs400_calib_table = in renesas_sdhi_filter_caps()
897 r8a7795_calib_table[!rmobile_is_gen3_mmc0(priv)]; in renesas_sdhi_filter_caps()
904 priv->adjust_hs400_enable = true; in renesas_sdhi_filter_caps()
905 priv->adjust_hs400_offset = 3; in renesas_sdhi_filter_caps()
906 priv->adjust_hs400_calib_table = in renesas_sdhi_filter_caps()
907 r8a7796_rev1_calib_table[!rmobile_is_gen3_mmc0(priv)]; in renesas_sdhi_filter_caps()
914 priv->adjust_hs400_enable = true; in renesas_sdhi_filter_caps()
915 priv->adjust_hs400_offset = 0; in renesas_sdhi_filter_caps()
916 priv->hs400_bad_tap = BIT(1) | BIT(3) | BIT(5) | BIT(7); in renesas_sdhi_filter_caps()
917 priv->adjust_hs400_calib_table = in renesas_sdhi_filter_caps()
918 r8a7796_rev3_calib_table[!rmobile_is_gen3_mmc0(priv)]; in renesas_sdhi_filter_caps()
923 priv->adjust_hs400_enable = true; in renesas_sdhi_filter_caps()
924 priv->adjust_hs400_offset = 3; in renesas_sdhi_filter_caps()
925 priv->adjust_hs400_calib_table = in renesas_sdhi_filter_caps()
926 r8a77965_calib_table[!rmobile_is_gen3_mmc0(priv)]; in renesas_sdhi_filter_caps()
931 priv->adjust_hs400_enable = true; in renesas_sdhi_filter_caps()
932 priv->adjust_hs400_offset = 3; in renesas_sdhi_filter_caps()
933 priv->adjust_hs400_calib_table = in renesas_sdhi_filter_caps()
934 r8a77990_calib_table[!rmobile_is_gen3_mmc0(priv)]; in renesas_sdhi_filter_caps()
943 priv->nrtaps = 4; in renesas_sdhi_filter_caps()
945 priv->nrtaps = 8; in renesas_sdhi_filter_caps()
953 priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD; in renesas_sdhi_filter_caps()
955 priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD2; in renesas_sdhi_filter_caps()
960 struct tmio_sd_priv *priv = dev_get_priv(dev); in renesas_sdhi_probe() local
966 priv->clk_get_rate = renesas_sdhi_clk_get_rate; in renesas_sdhi_probe()
981 ret = clk_get_by_index(dev, 0, &priv->clk); in renesas_sdhi_probe()
988 ret = clk_set_rate(&priv->clk, 200000000); in renesas_sdhi_probe()
991 clk_free(&priv->clk); in renesas_sdhi_probe()
995 ret = clk_enable(&priv->clk); in renesas_sdhi_probe()
1001 priv->quirks = quirks; in renesas_sdhi_probe()
1009 if (!ret && (priv->caps & TMIO_SD_CAP_RCAR_UHS)) in renesas_sdhi_probe()
1010 renesas_sdhi_reset_tuning(priv); in renesas_sdhi_probe()