Lines Matching refs:nor
39 static int spi_nor_read_write_reg(struct spi_nor *nor, struct spi_mem_op in spi_nor_read_write_reg() argument
46 return spi_mem_exec_op(nor->spi, op); in spi_nor_read_write_reg()
49 static int spi_nor_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len) in spi_nor_read_reg() argument
57 ret = spi_nor_read_write_reg(nor, &op, val); in spi_nor_read_reg()
64 dev_dbg(nor->spi->dev, "error %d reading %x\n", ret, in spi_nor_read_reg()
68 nor->spi->bus, nor->spi->cs, ret, code); in spi_nor_read_reg()
75 static int spi_nor_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len) in spi_nor_write_reg() argument
82 return spi_nor_read_write_reg(nor, &op, buf); in spi_nor_write_reg()
85 static ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len, in spi_nor_read_data() argument
89 SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1), in spi_nor_read_data()
90 SPI_MEM_OP_ADDR(nor->addr_width, from, 1), in spi_nor_read_data()
91 SPI_MEM_OP_DUMMY(nor->read_dummy, 1), in spi_nor_read_data()
97 op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->read_proto); in spi_nor_read_data()
98 op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto); in spi_nor_read_data()
100 op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->read_proto); in spi_nor_read_data()
103 op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8; in spi_nor_read_data()
107 ret = spi_mem_adjust_op_size(nor->spi, &op); in spi_nor_read_data()
111 ret = spi_mem_exec_op(nor->spi, &op); in spi_nor_read_data()
129 static int read_cr(struct spi_nor *nor) in read_cr() argument
134 ret = spi_nor_read_reg(nor, SPINOR_OP_RDCR, &val, 1); in read_cr()
136 dev_dbg(nor->dev, "error %d reading CR\n", ret); in read_cr()
148 static inline int write_sr(struct spi_nor *nor, u8 val) in write_sr() argument
150 nor->cmd_buf[0] = val; in write_sr()
151 return spi_nor_write_reg(nor, SPINOR_OP_WRSR, nor->cmd_buf, 1); in write_sr()
158 static inline int write_enable(struct spi_nor *nor) in write_enable() argument
160 return spi_nor_write_reg(nor, SPINOR_OP_WREN, NULL, 0); in write_enable()
166 static inline int write_disable(struct spi_nor *nor) in write_disable() argument
168 return spi_nor_write_reg(nor, SPINOR_OP_WRDI, NULL, 0); in write_disable()
203 static void spi_nor_set_4byte_opcodes(struct spi_nor *nor, in spi_nor_set_4byte_opcodes() argument
206 nor->read_opcode = spi_nor_convert_3to4_read(nor->read_opcode); in spi_nor_set_4byte_opcodes()
210 static inline int set_4byte(struct spi_nor *nor, const struct flash_info *info, in set_4byte() argument
225 write_enable(nor); in set_4byte()
228 status = spi_nor_write_reg(nor, cmd, NULL, 0); in set_4byte()
230 write_disable(nor); in set_4byte()
240 write_enable(nor); in set_4byte()
241 nor->cmd_buf[0] = 0; in set_4byte()
242 spi_nor_write_reg(nor, SPINOR_OP_WREAR, in set_4byte()
243 nor->cmd_buf, 1); in set_4byte()
244 write_disable(nor); in set_4byte()
250 nor->cmd_buf[0] = enable << 7; in set_4byte()
251 return spi_nor_write_reg(nor, SPINOR_OP_BRWR, nor->cmd_buf, 1); in set_4byte()
263 static int read_sr(struct spi_nor *nor) in read_sr() argument
268 ret = spi_nor_read_reg(nor, SPINOR_OP_RDSR, &val, 1); in read_sr()
282 static int read_fsr(struct spi_nor *nor) in read_fsr() argument
287 ret = spi_nor_read_reg(nor, SPINOR_OP_RDFSR, &val, 1); in read_fsr()
296 static int spi_nor_sr_ready(struct spi_nor *nor) in spi_nor_sr_ready() argument
298 int sr = read_sr(nor); in spi_nor_sr_ready()
306 static int spi_nor_fsr_ready(struct spi_nor *nor) in spi_nor_fsr_ready() argument
308 int fsr = read_fsr(nor); in spi_nor_fsr_ready()
315 static int spi_nor_ready(struct spi_nor *nor) in spi_nor_ready() argument
319 sr = spi_nor_sr_ready(nor); in spi_nor_ready()
322 fsr = nor->flags & SNOR_F_USE_FSR ? spi_nor_fsr_ready(nor) : 1; in spi_nor_ready()
332 static int spi_nor_wait_till_ready_with_timeout(struct spi_nor *nor, in spi_nor_wait_till_ready_with_timeout() argument
341 ret = spi_nor_ready(nor); in spi_nor_wait_till_ready_with_timeout()
348 dev_err(nor->dev, "flash operation timed out\n"); in spi_nor_wait_till_ready_with_timeout()
353 static int spi_nor_wait_till_ready(struct spi_nor *nor) in spi_nor_wait_till_ready() argument
355 return spi_nor_wait_till_ready_with_timeout(nor, in spi_nor_wait_till_ready()
369 static const struct flash_info *spi_nor_read_id(struct spi_nor *nor) in spi_nor_read_id() argument
375 tmp = spi_nor_read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN); in spi_nor_read_id()
377 dev_dbg(nor->dev, "error %d reading JEDEC ID\n", tmp); in spi_nor_read_id()
388 dev_dbg(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n", in spi_nor_read_id()
396 struct spi_nor *nor = mtd_to_spi_nor(mtd); in spi_nor_read() local
399 dev_dbg(nor->dev, "from 0x%08x, len %zd\n", (u32)from, len); in spi_nor_read()
404 ret = spi_nor_read_data(nor, addr, len, buf); in spi_nor_read()
446 static int macronix_quad_enable(struct spi_nor *nor) in macronix_quad_enable() argument
450 val = read_sr(nor); in macronix_quad_enable()
456 write_enable(nor); in macronix_quad_enable()
458 write_sr(nor, val | SR_QUAD_EN_MX); in macronix_quad_enable()
460 ret = spi_nor_wait_till_ready(nor); in macronix_quad_enable()
464 ret = read_sr(nor); in macronix_quad_enable()
466 dev_err(nor->dev, "Macronix Quad bit not set\n"); in macronix_quad_enable()
481 static int write_sr_cr(struct spi_nor *nor, u8 *sr_cr) in write_sr_cr() argument
485 write_enable(nor); in write_sr_cr()
487 ret = spi_nor_write_reg(nor, SPINOR_OP_WRSR, sr_cr, 2); in write_sr_cr()
489 dev_dbg(nor->dev, in write_sr_cr()
494 ret = spi_nor_wait_till_ready(nor); in write_sr_cr()
496 dev_dbg(nor->dev, in write_sr_cr()
517 static int spansion_read_cr_quad_enable(struct spi_nor *nor) in spansion_read_cr_quad_enable() argument
523 ret = read_cr(nor); in spansion_read_cr_quad_enable()
525 dev_dbg(nor->dev, in spansion_read_cr_quad_enable()
536 ret = read_sr(nor); in spansion_read_cr_quad_enable()
538 dev_dbg(nor->dev, "error while reading status register\n"); in spansion_read_cr_quad_enable()
543 ret = write_sr_cr(nor, sr_cr); in spansion_read_cr_quad_enable()
548 ret = read_cr(nor); in spansion_read_cr_quad_enable()
550 dev_dbg(nor->dev, "Spansion Quad bit not set\n"); in spansion_read_cr_quad_enable()
593 static int spi_nor_init_params(struct spi_nor *nor, in spi_nor_init_params() argument
620 static int spi_nor_select_read(struct spi_nor *nor, in spi_nor_select_read() argument
639 nor->read_opcode = read->opcode; in spi_nor_select_read()
640 nor->read_proto = read->proto; in spi_nor_select_read()
652 nor->read_dummy = read->num_mode_clocks + read->num_wait_states; in spi_nor_select_read()
656 static int spi_nor_setup(struct spi_nor *nor, const struct flash_info *info, in spi_nor_setup() argument
670 err = spi_nor_select_read(nor, params, shared_mask); in spi_nor_setup()
672 dev_dbg(nor->dev, in spi_nor_setup()
678 if (spi_nor_get_protocol_width(nor->read_proto) == 4) { in spi_nor_setup()
682 err = macronix_quad_enable(nor); in spi_nor_setup()
692 err = spansion_read_cr_quad_enable(nor); in spi_nor_setup()
698 dev_dbg(nor->dev, "quad mode not supported\n"); in spi_nor_setup()
705 static int spi_nor_init(struct spi_nor *nor) in spi_nor_init() argument
707 if (nor->addr_width == 4 && in spi_nor_init()
708 (JEDEC_MFR(nor->info) != SNOR_MFR_SPANSION) && in spi_nor_init()
709 !(nor->info->flags & SPI_NOR_4B_OPCODES)) { in spi_nor_init()
717 if (nor->flags & SNOR_F_BROKEN_RESET) in spi_nor_init()
719 set_4byte(nor, nor->info, 1); in spi_nor_init()
725 int spi_nor_scan(struct spi_nor *nor) in spi_nor_scan() argument
729 struct mtd_info *mtd = &nor->mtd; in spi_nor_scan()
734 struct spi_slave *spi = nor->spi; in spi_nor_scan()
738 nor->reg_proto = SNOR_PROTO_1_1_1; in spi_nor_scan()
739 nor->read_proto = SNOR_PROTO_1_1_1; in spi_nor_scan()
740 nor->write_proto = SNOR_PROTO_1_1_1; in spi_nor_scan()
745 info = spi_nor_read_id(nor); in spi_nor_scan()
749 ret = spi_nor_init_params(nor, info, ¶ms); in spi_nor_scan()
754 mtd->priv = nor; in spi_nor_scan()
763 nor->size = mtd->size; in spi_nor_scan()
766 nor->flags |= SNOR_F_USE_FSR; in spi_nor_scan()
768 nor->flags |= SNOR_F_USE_CLSR; in spi_nor_scan()
780 ret = spi_nor_setup(nor, info, ¶ms, &hwcaps); in spi_nor_scan()
784 if (nor->addr_width) { in spi_nor_scan()
787 nor->addr_width = info->addr_width; in spi_nor_scan()
790 nor->addr_width = 4; in spi_nor_scan()
793 spi_nor_set_4byte_opcodes(nor, info); in spi_nor_scan()
795 nor->addr_width = 3; in spi_nor_scan()
798 if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) { in spi_nor_scan()
799 dev_dbg(nor->dev, "address width is too large: %u\n", in spi_nor_scan()
800 nor->addr_width); in spi_nor_scan()
805 nor->info = info; in spi_nor_scan()
806 ret = spi_nor_init(nor); in spi_nor_scan()