Lines Matching refs:phydev
71 static int vitesse_config(struct phy_device *phydev) in vitesse_config() argument
74 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_AUX_CONSTAT, in vitesse_config()
77 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_EXT_CON1, in vitesse_config()
80 genphy_config_aneg(phydev); in vitesse_config()
85 static int vitesse_parse_status(struct phy_device *phydev) in vitesse_parse_status() argument
90 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_AUX_CONSTAT); in vitesse_parse_status()
93 phydev->duplex = DUPLEX_FULL; in vitesse_parse_status()
95 phydev->duplex = DUPLEX_HALF; in vitesse_parse_status()
100 phydev->speed = SPEED_1000; in vitesse_parse_status()
103 phydev->speed = SPEED_100; in vitesse_parse_status()
106 phydev->speed = SPEED_10; in vitesse_parse_status()
113 static int vitesse_startup(struct phy_device *phydev) in vitesse_startup() argument
117 ret = genphy_update_link(phydev); in vitesse_startup()
120 return vitesse_parse_status(phydev); in vitesse_startup()
123 static int cis8204_config(struct phy_device *phydev) in cis8204_config() argument
126 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_AUX_CONSTAT, in cis8204_config()
129 genphy_config_aneg(phydev); in cis8204_config()
131 if (phy_interface_is_rgmii(phydev)) in cis8204_config()
132 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS8204_EPHY_CON, in cis8204_config()
136 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_CIS8204_EPHY_CON, in cis8204_config()
146 static int vsc8601_add_skew(struct phy_device *phydev) in vsc8601_add_skew() argument
150 ret = phy_read(phydev, MDIO_DEVAD_NONE, MII_VSC8601_EPHY_CTL); in vsc8601_add_skew()
155 return phy_write(phydev, MDIO_DEVAD_NONE, MII_VSC8601_EPHY_CTL, ret); in vsc8601_add_skew()
158 static int vsc8601_config(struct phy_device *phydev) in vsc8601_config() argument
162 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) in vsc8601_config()
163 ret = vsc8601_add_skew(phydev); in vsc8601_config()
168 return genphy_config_aneg(phydev); in vsc8601_config()
171 static int vsc8574_config(struct phy_device *phydev) in vsc8574_config() argument
175 phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, in vsc8574_config()
178 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL19); in vsc8574_config()
179 if (phydev->interface == PHY_INTERFACE_MODE_QSGMII) { in vsc8574_config()
182 phy_write(phydev, MDIO_DEVAD_NONE, in vsc8574_config()
185 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18, in vsc8574_config()
190 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL19, val); in vsc8574_config()
192 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18, in vsc8574_config()
195 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18); in vsc8574_config()
198 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18); in vsc8574_config()
201 phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, in vsc8574_config()
203 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_MAC_SERDES_CON); in vsc8574_config()
205 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_MAC_SERDES_CON, val); in vsc8574_config()
207 phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, 0); in vsc8574_config()
209 genphy_config_aneg(phydev); in vsc8574_config()
214 static int vsc8514_config(struct phy_device *phydev) in vsc8514_config() argument
220 phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, in vsc8514_config()
223 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL19); in vsc8514_config()
224 if (phydev->interface == PHY_INTERFACE_MODE_QSGMII) { in vsc8514_config()
227 phy_write(phydev, MDIO_DEVAD_NONE, in vsc8514_config()
230 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL18, in vsc8514_config()
238 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL18); in vsc8514_config()
241 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL18); in vsc8514_config()
248 phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, 0); in vsc8514_config()
251 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL23); in vsc8514_config()
254 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL23, val); in vsc8514_config()
257 phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, in vsc8514_config()
259 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_MAC_SERDES_CON); in vsc8514_config()
261 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_MAC_SERDES_CON, val); in vsc8514_config()
262 phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, 0); in vsc8514_config()
264 genphy_config_aneg(phydev); in vsc8514_config()
269 static int vsc8664_config(struct phy_device *phydev) in vsc8664_config() argument
274 phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, 0); in vsc8664_config()
275 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8664_EPHY_CON); in vsc8664_config()
277 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8664_EPHY_CON, val); in vsc8664_config()
279 phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, in vsc8664_config()
281 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8664_SERDES_AND_SIGDET); in vsc8664_config()
283 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8664_SERDES_AND_SIGDET, val); in vsc8664_config()
284 phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, 0); in vsc8664_config()
287 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8664_LED_CON); in vsc8664_config()
289 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8664_LED_CON, val); in vsc8664_config()
291 genphy_config_aneg(phydev); in vsc8664_config()