Lines Matching refs:iobase
210 u32 iobase; in uli526x_initialize() local
219 pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase); in uli526x_initialize()
220 iobase &= ~0xf; in uli526x_initialize()
234 dev->iobase = iobase; in uli526x_initialize()
242 db->ioaddr = dev->iobase; in uli526x_initialize()
247 printf("uli526x: uli526x @0x%x\n", iobase); in uli526x_initialize()
351 update_cr6(db->cr6_data, dev->iobase); in uli526x_disable()
352 outl(0, dev->iobase + DCR7); /* Disable Interrupt */ in uli526x_disable()
353 outl(inl(dev->iobase + DCR5), dev->iobase + DCR5); in uli526x_disable()
459 outl(0, dev->iobase + DCR7); in uli526x_start_xmit()
473 outl(0x1, dev->iobase + DCR1); /* Issue Tx polling */ in uli526x_start_xmit()
485 outl(db->cr7_data, dev->iobase + DCR7); in uli526x_start_xmit()
812 static void uli_phy_write(unsigned long iobase, u8 phy_addr, u8 offset, in uli_phy_write() argument
819 phy_writeby_cr10(iobase, phy_addr, offset, phy_data); in uli_phy_write()
823 ioaddr = iobase + DCR9; in uli_phy_write()
861 static u16 uli_phy_read(unsigned long iobase, u8 phy_addr, u8 offset, in uli_phy_read() argument
869 return phy_readby_cr10(iobase, phy_addr, offset); in uli_phy_read()
871 ioaddr = iobase + DCR9; in uli_phy_read()
907 static u16 phy_readby_cr10(unsigned long iobase, u8 phy_addr, u8 offset) in phy_readby_cr10() argument
911 ioaddr = iobase + DCR10; in phy_readby_cr10()
925 static void phy_writeby_cr10(unsigned long iobase, u8 phy_addr, in phy_writeby_cr10() argument
930 ioaddr = iobase + DCR10; in phy_writeby_cr10()