Lines Matching refs:MSCC_P
96 MSCC_P(0, SIO, NONE, NONE);
97 MSCC_P(1, SIO, NONE, NONE);
98 MSCC_P(2, SIO, NONE, NONE);
99 MSCC_P(3, SIO, NONE, NONE);
100 MSCC_P(4, TACHO, NONE, NONE);
101 MSCC_P(5, PWM, NONE, NONE);
102 MSCC_P(6, TWI, NONE, NONE);
103 MSCC_P(7, TWI, NONE, NONE);
104 MSCC_P(8, SI, NONE, NONE);
105 MSCC_P(9, SI, MD, NONE);
106 MSCC_P(10, SI, MD, NONE);
107 MSCC_P(11, SFP0, MD, TWI_SCL_M);
108 MSCC_P(12, SFP1, MD, TWI_SCL_M);
109 MSCC_P(13, SFP2, UART2, TWI_SCL_M);
110 MSCC_P(14, SFP3, UART2, TWI_SCL_M);
111 MSCC_P(15, SFP4, PTP1588, TWI_SCL_M);
112 MSCC_P(16, SFP5, PTP1588, TWI_SCL_M);
113 MSCC_P(17, SFP6, PCI_WAKE, TWI_SCL_M);
114 MSCC_P(18, SFP7, NONE, TWI_SCL_M);
115 MSCC_P(19, SFP8, NONE, TWI_SCL_M);
116 MSCC_P(20, SFP9, NONE, TWI_SCL_M);
117 MSCC_P(21, SFP10, NONE, TWI_SCL_M);
118 MSCC_P(22, NONE, NONE, NONE);
119 MSCC_P(23, NONE, NONE, NONE);
120 MSCC_P(24, NONE, NONE, NONE);
121 MSCC_P(25, NONE, NONE, NONE);
122 MSCC_P(26, UART, NONE, NONE);
123 MSCC_P(27, UART, NONE, NONE);
124 MSCC_P(28, IRQ0, NONE, NONE);
125 MSCC_P(29, IRQ1, NONE, NONE);
126 MSCC_P(30, PTP1588, NONE, NONE);
127 MSCC_P(31, PTP1588, NONE, NONE);