Lines Matching refs:PINMUX_CFG_REG_VAR
4952 { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060020, 32,
4989 { PINMUX_CFG_REG_VAR("IPSR1", 0xE6060024, 32,
5027 { PINMUX_CFG_REG_VAR("IPSR2", 0xE6060028, 32,
5057 { PINMUX_CFG_REG_VAR("IPSR3", 0xE606002C, 32,
5091 { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060030, 32,
5125 { PINMUX_CFG_REG_VAR("IPSR5", 0xE6060034, 32,
5163 { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060038, 32,
5200 { PINMUX_CFG_REG_VAR("IPSR7", 0xE606003C, 32,
5236 { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060040, 32,
5278 { PINMUX_CFG_REG_VAR("IPSR9", 0xE6060044, 32,
5314 { PINMUX_CFG_REG_VAR("IPSR10", 0xE6060048, 32,
5354 { PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32,
5390 { PINMUX_CFG_REG_VAR("IPSR12", 0xE6060050, 32,
5430 { PINMUX_CFG_REG_VAR("IPSR13", 0xE6060054, 32,
5467 { PINMUX_CFG_REG_VAR("IPSR14", 0xE6060058, 32,
5506 { PINMUX_CFG_REG_VAR("IPSR15", 0xE606005C, 32,
5542 { PINMUX_CFG_REG_VAR("IPSR16", 0xE6060160, 32,
5574 { PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32,
5625 { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32,
5668 { PINMUX_CFG_REG_VAR("MOD_SEL3", 0xE6060098, 32,