Lines Matching refs:chan
70 struct chan_info chan[2]; member
89 void (*modify_param)(const struct chan_info *chan,
217 static void *get_denali_ctl(const struct chan_info *chan, in get_denali_ctl() argument
220 return reg ? &chan->pctl->denali_ctl : ¶ms->pctl_regs.denali_ctl; in get_denali_ctl()
223 static void *get_denali_phy(const struct chan_info *chan, in get_denali_phy() argument
226 return reg ? &chan->publ->denali_phy : ¶ms->phy_regs.denali_phy; in get_denali_phy()
288 static void set_memory_map(const struct chan_info *chan, u32 channel, in set_memory_map() argument
292 u32 *denali_ctl = chan->pctl->denali_ctl; in set_memory_map()
293 u32 *denali_pi = chan->pi->denali_pi; in set_memory_map()
563 static void set_ds_odt(const struct chan_info *chan, in set_ds_odt() argument
567 u32 *denali_phy = get_denali_phy(chan, params, ctl_phy_reg); in set_ds_odt()
568 u32 *denali_ctl = get_denali_ctl(chan, params, ctl_phy_reg); in set_ds_odt()
791 const struct chan_info *chan_0 = &dram->chan[0]; in pctl_start()
792 const struct chan_info *chan_1 = &dram->chan[1]; in pctl_start()
890 static int pctl_cfg(struct dram_info *dram, const struct chan_info *chan, in pctl_cfg() argument
893 u32 *denali_ctl = chan->pctl->denali_ctl; in pctl_cfg()
894 u32 *denali_pi = chan->pi->denali_pi; in pctl_cfg()
895 u32 *denali_phy = chan->publ->denali_phy; in pctl_cfg()
902 dram->ops->modify_param(chan, params); in pctl_cfg()
929 set_memory_map(chan, channel, params); in pctl_cfg()
1033 static void select_per_cs_training_index(const struct chan_info *chan, in select_per_cs_training_index() argument
1036 u32 *denali_phy = chan->publ->denali_phy; in select_per_cs_training_index()
1051 static void override_write_leveling_value(const struct chan_info *chan) in override_write_leveling_value() argument
1053 u32 *denali_ctl = chan->pctl->denali_ctl; in override_write_leveling_value()
1054 u32 *denali_phy = chan->publ->denali_phy; in override_write_leveling_value()
1080 static int data_training_ca(const struct chan_info *chan, u32 channel, in data_training_ca() argument
1083 u32 *denali_pi = chan->pi->denali_pi; in data_training_ca()
1084 u32 *denali_phy = chan->publ->denali_phy; in data_training_ca()
1102 select_per_cs_training_index(chan, i); in data_training_ca()
1146 static int data_training_wl(const struct chan_info *chan, u32 channel, in data_training_wl() argument
1149 u32 *denali_pi = chan->pi->denali_pi; in data_training_wl()
1150 u32 *denali_phy = chan->publ->denali_phy; in data_training_wl()
1159 select_per_cs_training_index(chan, i); in data_training_wl()
1202 override_write_leveling_value(chan); in data_training_wl()
1208 static int data_training_rg(const struct chan_info *chan, u32 channel, in data_training_rg() argument
1211 u32 *denali_pi = chan->pi->denali_pi; in data_training_rg()
1212 u32 *denali_phy = chan->publ->denali_phy; in data_training_rg()
1221 select_per_cs_training_index(chan, i); in data_training_rg()
1272 static int data_training_rl(const struct chan_info *chan, u32 channel, in data_training_rl() argument
1275 u32 *denali_pi = chan->pi->denali_pi; in data_training_rl()
1283 select_per_cs_training_index(chan, i); in data_training_rl()
1320 static int data_training_wdql(const struct chan_info *chan, u32 channel, in data_training_wdql() argument
1323 u32 *denali_pi = chan->pi->denali_pi; in data_training_wdql()
1340 select_per_cs_training_index(chan, i); in data_training_wdql()
1380 struct chan_info *chan = &dram->chan[channel]; in data_training() local
1381 u32 *denali_phy = chan->publ->denali_phy; in data_training()
1404 ret = data_training_ca(chan, channel, params); in data_training()
1413 ret = data_training_wl(chan, channel, params); in data_training()
1422 ret = data_training_rg(chan, channel, params); in data_training()
1431 ret = data_training_rl(chan, channel, params); in data_training()
1440 ret = data_training_wdql(chan, channel, params); in data_training()
1453 static void set_ddrconfig(const struct chan_info *chan, in set_ddrconfig() argument
1458 struct msch_regs *ddr_msch_regs = chan->msch; in set_ddrconfig()
1513 ddr_msch_regs = dram->chan[channel].msch; in dram_all_config()
1529 setbits_le32(&dram->chan[channel].pctl->denali_ctl[276], in dram_all_config()
1545 static void set_cap_relate_config(const struct chan_info *chan, in set_cap_relate_config() argument
1549 u32 *denali_ctl = chan->pctl->denali_ctl; in set_cap_relate_config()
1679 denali_phy = dram->chan[channel].publ->denali_phy; in switch_to_phy_index1()
1701 void modify_param(const struct chan_info *chan, in modify_param() argument
1711 set_ds_odt(chan, params_cfg, false, 0); in modify_param()
1739 static void *get_denali_pi(const struct chan_info *chan, in get_denali_pi() argument
1742 return reg ? &chan->pi->denali_pi : ¶ms->pi_regs.denali_pi; in get_denali_pi()
1810 struct chan_info *chan = &dram->chan[channel]; in lpddr4_mr_detect() local
1811 struct rk3399_ddr_pctl_regs *ddr_pctl_regs = chan->pctl; in lpddr4_mr_detect()
1842 set_memory_map(chan, channel, params); in lpddr4_mr_detect()
1845 set_ddrconfig(chan, params, channel, in lpddr4_mr_detect()
1847 set_cap_relate_config(chan, params, channel); in lpddr4_mr_detect()
1894 static void set_lpddr4_dq_odt(const struct chan_info *chan, in set_lpddr4_dq_odt() argument
1898 u32 *denali_ctl = get_denali_ctl(chan, params, ctl_phy_reg); in set_lpddr4_dq_odt()
1899 u32 *denali_pi = get_denali_pi(chan, params, ctl_phy_reg); in set_lpddr4_dq_odt()
1941 static void set_lpddr4_ca_odt(const struct chan_info *chan, in set_lpddr4_ca_odt() argument
1945 u32 *denali_ctl = get_denali_ctl(chan, params, ctl_phy_reg); in set_lpddr4_ca_odt()
1946 u32 *denali_pi = get_denali_pi(chan, params, ctl_phy_reg); in set_lpddr4_ca_odt()
1988 static void set_lpddr4_MR3(const struct chan_info *chan, in set_lpddr4_MR3() argument
1992 u32 *denali_ctl = get_denali_ctl(chan, params, ctl_phy_reg); in set_lpddr4_MR3()
1993 u32 *denali_pi = get_denali_pi(chan, params, ctl_phy_reg); in set_lpddr4_MR3()
2035 static void set_lpddr4_MR12(const struct chan_info *chan, in set_lpddr4_MR12() argument
2039 u32 *denali_ctl = get_denali_ctl(chan, params, ctl_phy_reg); in set_lpddr4_MR12()
2040 u32 *denali_pi = get_denali_pi(chan, params, ctl_phy_reg); in set_lpddr4_MR12()
2084 static void set_lpddr4_MR14(const struct chan_info *chan, in set_lpddr4_MR14() argument
2088 u32 *denali_ctl = get_denali_ctl(chan, params, ctl_phy_reg); in set_lpddr4_MR14()
2089 u32 *denali_pi = get_denali_pi(chan, params, ctl_phy_reg); in set_lpddr4_MR14()
2133 void lpddr4_modify_param(const struct chan_info *chan, in lpddr4_modify_param() argument
2145 set_lpddr4_dq_odt(chan, params, 2, true, false, 0); in lpddr4_modify_param()
2146 set_lpddr4_ca_odt(chan, params, 2, true, false, 0); in lpddr4_modify_param()
2147 set_lpddr4_MR3(chan, params, 2, false, 0); in lpddr4_modify_param()
2148 set_lpddr4_MR12(chan, params, 2, false, 0); in lpddr4_modify_param()
2149 set_lpddr4_MR14(chan, params, 2, false, 0); in lpddr4_modify_param()
2151 set_ds_odt(chan, params_cfg, false, 0); in lpddr4_modify_param()
2193 denali_ctl = dram->chan[channel].pctl->denali_ctl; in lpddr4_copy_phy()
2194 denali_phy = dram->chan[channel].publ->denali_phy; in lpddr4_copy_phy()
2426 read_mr(dram->chan[channel].pctl, 1, 5, &mr5); in lpddr4_copy_phy()
2427 set_ds_odt(&dram->chan[channel], params_cfg, true, mr5); in lpddr4_copy_phy()
2430 set_lpddr4_dq_odt(&dram->chan[channel], params_cfg, in lpddr4_copy_phy()
2432 set_lpddr4_ca_odt(&dram->chan[channel], params_cfg, in lpddr4_copy_phy()
2434 set_lpddr4_MR3(&dram->chan[channel], params_cfg, in lpddr4_copy_phy()
2436 set_lpddr4_MR12(&dram->chan[channel], params_cfg, in lpddr4_copy_phy()
2438 set_lpddr4_MR14(&dram->chan[channel], params_cfg, in lpddr4_copy_phy()
2569 static void dram_set_cs(const struct chan_info *chan, u32 cs_map, u32 cs0_cap, in dram_set_cs() argument
2572 u32 *denali_ctl = chan->pctl->denali_ctl; in dram_set_cs()
2573 u32 *denali_pi = chan->pi->denali_pi; in dram_set_cs()
2574 struct msch_regs *ddr_msch_regs = chan->msch; in dram_set_cs()
2594 static void dram_set_bw(const struct chan_info *chan, u32 bw) in dram_set_bw() argument
2596 u32 *denali_ctl = chan->pctl->denali_ctl; in dram_set_bw()
2604 static void dram_set_max_col(const struct chan_info *chan, u32 bw, u32 *pcol) in dram_set_max_col() argument
2606 u32 *denali_ctl = chan->pctl->denali_ctl; in dram_set_max_col()
2607 struct msch_regs *ddr_msch_regs = chan->msch; in dram_set_max_col()
2608 u32 *denali_pi = chan->pi->denali_pi; in dram_set_max_col()
2630 static void dram_set_max_bank(const struct chan_info *chan, u32 bw, u32 *pbank, in dram_set_max_bank() argument
2633 u32 *denali_ctl = chan->pctl->denali_ctl; in dram_set_max_bank()
2634 u32 *denali_pi = chan->pi->denali_pi; in dram_set_max_bank()
2647 static void dram_set_max_row(const struct chan_info *chan, u32 bw, u32 *prow, in dram_set_max_row() argument
2650 u32 *denali_ctl = chan->pctl->denali_ctl; in dram_set_max_row()
2651 u32 *denali_pi = chan->pi->denali_pi; in dram_set_max_row()
2652 struct msch_regs *ddr_msch_regs = chan->msch; in dram_set_max_row()
2676 const struct chan_info *chan = &dram->chan[channel]; in dram_detect_cap() local
2689 dram_set_bw(chan, bw); in dram_detect_cap()
2694 dram_set_bw(chan, 1); in dram_detect_cap()
2720 dram_set_max_col(chan, bw, &col_tmp); in dram_detect_cap()
2725 dram_set_max_bank(chan, bw, &bk_tmp, &col_tmp); in dram_detect_cap()
2729 dram_set_max_row(chan, bw, &row_tmp, &bk_tmp, &col_tmp); in dram_detect_cap()
2743 set_memory_map(chan, channel, params); in dram_detect_cap()
2747 set_ddrconfig(chan, params, channel, in dram_detect_cap()
2924 const struct chan_info *chan = in sdram_init() local
2925 &dram->chan[channel]; in sdram_init()
2927 struct rk3399_ddr_publ_regs *publ = chan->publ; in sdram_init()
2931 pctl_cfg(dram, chan, channel, params); in sdram_init()
2942 dram_set_cs(&dram->chan[ch], tmp, 2048, in sdram_init()
2960 const struct chan_info *chan = &dram->chan[channel]; in sdram_init() local
2987 set_memory_map(chan, channel, params); in sdram_init()
2994 set_ddrconfig(chan, params, channel, cap_info->ddrconfig); in sdram_init()
2995 set_cap_relate_config(chan, params, channel); in sdram_init()
3091 priv->chan[0].pctl = regmap_get_range(plat->map, 0); in rk3399_dmc_init()
3092 priv->chan[0].pi = regmap_get_range(plat->map, 1); in rk3399_dmc_init()
3093 priv->chan[0].publ = regmap_get_range(plat->map, 2); in rk3399_dmc_init()
3094 priv->chan[0].msch = regmap_get_range(plat->map, 3); in rk3399_dmc_init()
3095 priv->chan[1].pctl = regmap_get_range(plat->map, 4); in rk3399_dmc_init()
3096 priv->chan[1].pi = regmap_get_range(plat->map, 5); in rk3399_dmc_init()
3097 priv->chan[1].publ = regmap_get_range(plat->map, 6); in rk3399_dmc_init()
3098 priv->chan[1].msch = regmap_get_range(plat->map, 7); in rk3399_dmc_init()
3101 priv->chan[0].pctl, priv->chan[0].pi, in rk3399_dmc_init()
3102 priv->chan[0].publ, priv->chan[0].msch, in rk3399_dmc_init()
3103 priv->chan[1].pctl, priv->chan[1].pi, in rk3399_dmc_init()
3104 priv->chan[1].publ, priv->chan[1].msch); in rk3399_dmc_init()