Lines Matching refs:ctl

303 		return (u32)priv->ctl;  in get_base_addr()
588 static void start_sw_done(struct stm32mp1_ddrctl *ctl) in start_sw_done() argument
590 clrbits_le32(&ctl->swctl, DDRCTRL_SWCTL_SW_DONE); in start_sw_done()
594 static void wait_sw_done_ack(struct stm32mp1_ddrctl *ctl) in wait_sw_done_ack() argument
599 setbits_le32(&ctl->swctl, DDRCTRL_SWCTL_SW_DONE); in wait_sw_done_ack()
601 ret = readl_poll_timeout(&ctl->swstat, swstat, in wait_sw_done_ack()
608 log_debug("[0x%08x] swstat = 0x%08x\n", (u32)&ctl->swstat, swstat); in wait_sw_done_ack()
631 ret = readl_poll_timeout(&priv->ctl->stat, stat, in wait_operating_mode()
639 log_debug("[0x%08x] stat = 0x%08x\n", (u32)&priv->ctl->stat, stat); in wait_operating_mode()
642 void stm32mp1_refresh_disable(struct stm32mp1_ddrctl *ctl) in stm32mp1_refresh_disable() argument
644 start_sw_done(ctl); in stm32mp1_refresh_disable()
646 setbits_le32(&ctl->rfshctl3, DDRCTRL_RFSHCTL3_DIS_AUTO_REFRESH); in stm32mp1_refresh_disable()
647 clrbits_le32(&ctl->pwrctl, DDRCTRL_PWRCTL_POWERDOWN_EN | in stm32mp1_refresh_disable()
649 clrbits_le32(&ctl->dfimisc, DDRCTRL_DFIMISC_DFI_INIT_COMPLETE_EN); in stm32mp1_refresh_disable()
650 wait_sw_done_ack(ctl); in stm32mp1_refresh_disable()
653 void stm32mp1_refresh_restore(struct stm32mp1_ddrctl *ctl, in stm32mp1_refresh_restore() argument
656 start_sw_done(ctl); in stm32mp1_refresh_restore()
658 clrbits_le32(&ctl->rfshctl3, DDRCTRL_RFSHCTL3_DIS_AUTO_REFRESH); in stm32mp1_refresh_restore()
660 setbits_le32(&ctl->pwrctl, DDRCTRL_PWRCTL_POWERDOWN_EN); in stm32mp1_refresh_restore()
662 setbits_le32(&ctl->pwrctl, DDRCTRL_PWRCTL_SELFREF_EN); in stm32mp1_refresh_restore()
663 setbits_le32(&ctl->dfimisc, DDRCTRL_DFIMISC_DFI_INIT_COMPLETE_EN); in stm32mp1_refresh_restore()
664 wait_sw_done_ack(ctl); in stm32mp1_refresh_restore()
749 clrbits_le32(&priv->ctl->dfimisc, DDRCTRL_DFIMISC_DFI_INIT_COMPLETE_EN); in stm32mp1_ddr_init()
751 (u32)&priv->ctl->dfimisc, readl(&priv->ctl->dfimisc)); in stm32mp1_ddr_init()
758 clrsetbits_le32(&priv->ctl->init0, in stm32mp1_ddr_init()
802 start_sw_done(priv->ctl); in stm32mp1_ddr_init()
803 setbits_le32(&priv->ctl->dfimisc, DDRCTRL_DFIMISC_DFI_INIT_COMPLETE_EN); in stm32mp1_ddr_init()
804 wait_sw_done_ack(priv->ctl); in stm32mp1_ddr_init()
822 stm32mp1_refresh_disable(priv->ctl); in stm32mp1_ddr_init()
836 stm32mp1_refresh_restore(priv->ctl, config->c_reg.rfshctl3, in stm32mp1_ddr_init()
841 setbits_le32(&priv->ctl->pctrl_0, DDRCTRL_PCTRL_N_PORT_EN); in stm32mp1_ddr_init()
842 setbits_le32(&priv->ctl->pctrl_1, DDRCTRL_PCTRL_N_PORT_EN); in stm32mp1_ddr_init()