Lines Matching refs:on
5 depends on DM && OF_CONTROL
17 depends on DM_MAILBOX && SANDBOX
25 depends on ARCH_STI
27 Support for reset controllers on STMicroelectronics STiH407 family SoCs.
33 depends on ARCH_STM32 || ARCH_STM32MP
35 Support for reset controllers on STMicroelectronics STM32 family SoCs.
40 depends on TEGRA_CAR
42 Enable support for manipulating Tegra's on-SoC reset signals via
47 depends on TEGRA186_BPMP
49 Enable support for manipulating Tegra's on-SoC reset signals via IPC
54 depends on DM_RESET && TI_SCI_PROTOCOL
57 available on some new TI's SoCs. If you wish to use reset resources
62 depends on DM_RESET && ARCH_BMIPS
64 Support reset controller on BCM6345.
68 depends on ARCH_UNIPHIER
71 Support for reset controllers on UniPhier SoCs.
77 depends on DM_RESET
80 Support for reset controller on AST2500 SoC.
86 depends on DM_RESET
89 Support for reset controller on AST2600 SoC.
95 depends on DM_RESET && ARCH_ROCKCHIP && CLK
98 Support for reset controller on rockchip SoC. The main limitation
104 depends on DM_RESET && TARGET_HSDK
111 depends on DM_RESET && ARCH_MESON
115 Support for reset controller on Amlogic Meson SoC.
119 depends on DM_RESET && ARCH_SOCFPGA
122 Support for reset controller on SoCFPGA platform.
126 depends on DM_RESET && ARCH_MEDIATEK && CLK
129 Support for reset controller on MediaTek SoCs.
133 depends on DM_RESET && ARCH_MTMIPS
136 Support for reset controller on MediaTek MIPS platform.
140 depends on DM_RESET && ARCH_SUNXI
148 depends on DM_RESET
150 Support for reset controller on HiSilicon SoCs.
154 depends on DM_RESET && (ARCH_MX7 || ARCH_IMX8M)
157 Support for reset controller on i.MX7/8 SoCs.
161 depends on DM_RESET && ARCH_IPQ40XX
164 Support for reset controller on Qualcomm
169 depends on DM_RESET && CLK_SIFIVE_FU540_PRCI && TARGET_SIFIVE_FU540
178 depends on DM_RESET
184 depends on DM_RESET && ARCH_BCM283X
198 devices exposed by a SCMI agent based on SCMI reset domain