Lines Matching refs:ctlr
98 static void ich_set_bbar(struct ich_spi_priv *ctlr, uint32_t minaddr) in ich_set_bbar() argument
103 if (ctlr->bbar) { in ich_set_bbar()
105 ichspi_bbar = ich_readl(ctlr, ctlr->bbar) & ~bbar_mask; in ich_set_bbar()
107 ich_writel(ctlr, ichspi_bbar, ctlr->bbar); in ich_set_bbar()
161 static int spi_setup_opcode(struct ich_spi_priv *ctlr, struct spi_trans *trans, in spi_setup_opcode() argument
165 uint8_t opmenu[ctlr->menubytes]; in spi_setup_opcode()
169 ich_writeb(ctlr, trans->opcode, ctlr->opmenu); in spi_setup_opcode()
170 optypes = ich_readw(ctlr, ctlr->optype); in spi_setup_opcode()
172 ich_writew(ctlr, optypes, ctlr->optype); in spi_setup_opcode()
183 read_reg(ctlr, ctlr->opmenu, opmenu, sizeof(opmenu)); in spi_setup_opcode()
184 for (opcode_index = 0; opcode_index < ctlr->menubytes; in spi_setup_opcode()
190 if (opcode_index == ctlr->menubytes) { in spi_setup_opcode()
195 optypes = ich_readw(ctlr, ctlr->optype); in spi_setup_opcode()
214 static int ich_status_poll(struct ich_spi_priv *ctlr, u16 bitmask, in ich_status_poll() argument
221 status = ich_readw(ctlr, ctlr->status); in ich_status_poll()
224 ich_writew(ctlr, status & bitmask, in ich_status_poll()
225 ctlr->status); in ich_status_poll()
239 struct ich_spi_priv *ctlr = dev_get_priv(dev); in ich_spi_config_opcode() local
246 ich_writew(ctlr, SPI_OPPREFIX, ctlr->preop); in ich_spi_config_opcode()
247 ich_writew(ctlr, SPI_OPTYPE, ctlr->optype); in ich_spi_config_opcode()
248 ich_writel(ctlr, SPI_OPMENU_LOWER, ctlr->opmenu); in ich_spi_config_opcode()
249 ich_writel(ctlr, SPI_OPMENU_UPPER, ctlr->opmenu + sizeof(u32)); in ich_spi_config_opcode()
257 struct ich_spi_priv *ctlr = dev_get_priv(bus); in ich_spi_exec_op_swseq() local
262 struct spi_trans *trans = &ctlr->trans; in ich_spi_exec_op_swseq()
263 bool lock = spi_lock_status(plat, ctlr->base); in ich_spi_exec_op_swseq()
293 ich_writew(ctlr, trans->opcode, ctlr->preop); in ich_spi_exec_op_swseq()
297 ret = ich_status_poll(ctlr, SPIS_SCIP, 0); in ich_spi_exec_op_swseq()
302 ich_writew(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status); in ich_spi_exec_op_swseq()
304 ich_writeb(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status); in ich_spi_exec_op_swseq()
322 opcode_index = spi_setup_opcode(ctlr, trans, lock); in ich_spi_exec_op_swseq()
331 if (ctlr->speed && ctlr->max_speed >= 33000000) { in ich_spi_exec_op_swseq()
334 byte = ich_readb(ctlr, ctlr->speed); in ich_spi_exec_op_swseq()
335 if (ctlr->cur_speed >= 33000000) in ich_spi_exec_op_swseq()
339 ich_writeb(ctlr, byte, ctlr->speed); in ich_spi_exec_op_swseq()
346 if (ich_readw(ctlr, ctlr->preop)) in ich_spi_exec_op_swseq()
352 ich_writel(ctlr, trans->offset & 0x00FFFFFF, in ich_spi_exec_op_swseq()
353 ctlr->addr); in ich_spi_exec_op_swseq()
361 ich_writew(ctlr, control, ctlr->control); in ich_spi_exec_op_swseq()
364 status = ich_status_poll(ctlr, SPIS_CDS | SPIS_FCERR, 1); in ich_spi_exec_op_swseq()
380 ich_writel(ctlr, trans->offset & 0x00FFFFFF, ctlr->addr); in ich_spi_exec_op_swseq()
383 data_length = min(trans->bytesout, ctlr->databytes); in ich_spi_exec_op_swseq()
385 data_length = min(trans->bytesin, ctlr->databytes); in ich_spi_exec_op_swseq()
389 write_reg(ctlr, trans->out, ctlr->data, data_length); in ich_spi_exec_op_swseq()
394 control &= ~((ctlr->databytes - 1) << 8); in ich_spi_exec_op_swseq()
399 ich_writew(ctlr, control, ctlr->control); in ich_spi_exec_op_swseq()
402 status = ich_status_poll(ctlr, SPIS_CDS | SPIS_FCERR, 1); in ich_spi_exec_op_swseq()
412 read_reg(ctlr, ctlr->data, trans->in, data_length); in ich_spi_exec_op_swseq()
419 ich_writew(ctlr, 0, ctlr->preop); in ich_spi_exec_op_swseq()
781 struct ich_spi_priv *ctlr) in ich_init_controller() argument
792 ctlr->base = (void *)plat->mmio_base; in ich_init_controller()
794 struct ich7_spi_regs *ich7_spi = ctlr->base; in ich_init_controller()
796 ctlr->opmenu = offsetof(struct ich7_spi_regs, opmenu); in ich_init_controller()
797 ctlr->menubytes = sizeof(ich7_spi->opmenu); in ich_init_controller()
798 ctlr->optype = offsetof(struct ich7_spi_regs, optype); in ich_init_controller()
799 ctlr->addr = offsetof(struct ich7_spi_regs, spia); in ich_init_controller()
800 ctlr->data = offsetof(struct ich7_spi_regs, spid); in ich_init_controller()
801 ctlr->databytes = sizeof(ich7_spi->spid); in ich_init_controller()
802 ctlr->status = offsetof(struct ich7_spi_regs, spis); in ich_init_controller()
803 ctlr->control = offsetof(struct ich7_spi_regs, spic); in ich_init_controller()
804 ctlr->bbar = offsetof(struct ich7_spi_regs, bbar); in ich_init_controller()
805 ctlr->preop = offsetof(struct ich7_spi_regs, preop); in ich_init_controller()
807 struct ich9_spi_regs *ich9_spi = ctlr->base; in ich_init_controller()
809 ctlr->opmenu = offsetof(struct ich9_spi_regs, opmenu); in ich_init_controller()
810 ctlr->menubytes = sizeof(ich9_spi->opmenu); in ich_init_controller()
811 ctlr->optype = offsetof(struct ich9_spi_regs, optype); in ich_init_controller()
812 ctlr->addr = offsetof(struct ich9_spi_regs, faddr); in ich_init_controller()
813 ctlr->data = offsetof(struct ich9_spi_regs, fdata); in ich_init_controller()
814 ctlr->databytes = sizeof(ich9_spi->fdata); in ich_init_controller()
815 ctlr->status = offsetof(struct ich9_spi_regs, ssfs); in ich_init_controller()
816 ctlr->control = offsetof(struct ich9_spi_regs, ssfc); in ich_init_controller()
817 ctlr->speed = ctlr->control + 2; in ich_init_controller()
818 ctlr->bbar = offsetof(struct ich9_spi_regs, bbar); in ich_init_controller()
819 ctlr->preop = offsetof(struct ich9_spi_regs, preop); in ich_init_controller()
820 ctlr->bcr = offsetof(struct ich9_spi_regs, bcr); in ich_init_controller()
821 ctlr->pr = &ich9_spi->pr[0]; in ich_init_controller()
830 ctlr->max_speed = 20000000; in ich_init_controller()
832 ctlr->max_speed = 33000000; in ich_init_controller()
834 plat->ich_version, plat->mmio_base, ctlr->max_speed); in ich_init_controller()
836 ich_set_bbar(ctlr, 0); in ich_init_controller()