Lines Matching refs:cpu_to_le32
240 prev->trbs[TRBS_PER_SEGMENT-1].link.control = cpu_to_le32(val); in xhci_link_segments()
340 cpu_to_le32(LINK_TOGGLE); in xhci_ring_alloc()
569 entry->seg_size = cpu_to_le32(TRBS_PER_SEGMENT); in xhci_mem_init()
750 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1)); in xhci_setup_addressable_virt_dev()
775 slot_ctx->dev_info |= cpu_to_le32(route); in xhci_setup_addressable_virt_dev()
779 slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_SS); in xhci_setup_addressable_virt_dev()
782 slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_HS); in xhci_setup_addressable_virt_dev()
785 slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_FS); in xhci_setup_addressable_virt_dev()
788 slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_LS); in xhci_setup_addressable_virt_dev()
812 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT); in xhci_setup_addressable_virt_dev()
813 slot_ctx->tt_info |= cpu_to_le32(TT_PORT(port_num)); in xhci_setup_addressable_virt_dev()
814 slot_ctx->tt_info |= cpu_to_le32(TT_SLOT(dev->slot_id)); in xhci_setup_addressable_virt_dev()
823 cpu_to_le32(((port_num & ROOT_HUB_PORT_MASK) << in xhci_setup_addressable_virt_dev()
828 ep0_ctx->ep_info2 = cpu_to_le32(EP_TYPE(CTRL_EP)); in xhci_setup_addressable_virt_dev()
833 ep0_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(512)); in xhci_setup_addressable_virt_dev()
839 ep0_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(64)); in xhci_setup_addressable_virt_dev()
843 ep0_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(8)); in xhci_setup_addressable_virt_dev()
852 ep0_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(0) | ERROR_COUNT(3)); in xhci_setup_addressable_virt_dev()
861 ep0_ctx->tx_info = cpu_to_le32(EP_AVG_TRB_LENGTH(8)); in xhci_setup_addressable_virt_dev()