Lines Matching refs:csr
235 u32 csr; in mtu3_ep_stall_set() local
238 csr = mtu3_readl(mbase, MU3D_EP_TXCR0(epnum)) & TX_W1C_BITS; in mtu3_ep_stall_set()
240 csr |= TX_SENDSTALL; in mtu3_ep_stall_set()
242 csr = (csr & (~TX_SENDSTALL)) | TX_SENTSTALL; in mtu3_ep_stall_set()
243 mtu3_writel(mbase, MU3D_EP_TXCR0(epnum), csr); in mtu3_ep_stall_set()
245 csr = mtu3_readl(mbase, MU3D_EP_RXCR0(epnum)) & RX_W1C_BITS; in mtu3_ep_stall_set()
247 csr |= RX_SENDSTALL; in mtu3_ep_stall_set()
249 csr = (csr & (~RX_SENDSTALL)) | RX_SENTSTALL; in mtu3_ep_stall_set()
250 mtu3_writel(mbase, MU3D_EP_RXCR0(epnum), csr); in mtu3_ep_stall_set()
482 u32 csr; in mtu3_ep0_setup() local
486 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR); in mtu3_ep0_setup()
487 csr &= ~EP0_MAXPKTSZ_MSK; in mtu3_ep0_setup()
488 csr |= EP0_MAXPKTSZ(maxpacket); in mtu3_ep0_setup()
489 csr &= EP0_W1C_BITS; in mtu3_ep0_setup()
490 mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr); in mtu3_ep0_setup()