Lines Matching refs:style
1085 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1086 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1087 { .hw_ep_num = 2, .style = FIFO_RXTX, .maxpacket = 512, },
1088 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1089 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1094 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1095 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1096 { .hw_ep_num = 2, .style = FIFO_RXTX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1097 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1098 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1103 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1104 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1105 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1106 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1107 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1108 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1113 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1114 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1115 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1116 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1117 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1118 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1123 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1124 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1125 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1126 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1127 { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
1128 { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
1129 { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
1130 { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
1131 { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
1132 { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
1133 { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 512, },
1134 { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 512, },
1135 { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, },
1136 { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 512, },
1137 { .hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 512, },
1138 { .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 512, },
1139 { .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 512, },
1140 { .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 512, },
1141 { .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 256, },
1142 { .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 64, },
1143 { .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 256, },
1144 { .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 64, },
1145 { .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 256, },
1146 { .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 64, },
1147 { .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 4096, },
1148 { .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, },
1149 { .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, },
1154 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1155 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1156 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1157 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1158 { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
1159 { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
1160 { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
1161 { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
1162 { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
1163 { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
1164 { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 32, },
1165 { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 32, },
1166 { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 32, },
1167 { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 32, },
1168 { .hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 32, },
1169 { .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 32, },
1170 { .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 32, },
1171 { .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 32, },
1172 { .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 32, },
1173 { .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 32, },
1174 { .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 32, },
1175 { .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 32, },
1176 { .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 32, },
1177 { .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 32, },
1178 { .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 512, },
1179 { .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, },
1180 { .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, },
1224 switch (cfg->style) { in fifo_setup()
1261 .style = FIFO_RXTX, .maxpacket = 64,