Lines Matching refs:musb
31 #define next_ep0_request(musb) next_in_request(&(musb)->endpoints[0]) argument
61 struct musb *musb, in service_tx_status_request() argument
64 void __iomem *mbase = musb->mregs; in service_tx_status_request()
73 result[0] = musb->is_self_powered << USB_DEVICE_SELF_POWERED; in service_tx_status_request()
74 result[0] |= musb->may_wakeup << USB_DEVICE_REMOTE_WAKEUP; in service_tx_status_request()
75 if (musb->g.is_otg) { in service_tx_status_request()
76 result[0] |= musb->g.b_hnp_enable in service_tx_status_request()
78 result[0] |= musb->g.a_alt_hnp_support in service_tx_status_request()
80 result[0] |= musb->g.a_hnp_support in service_tx_status_request()
104 ep = &musb->endpoints[epnum].ep_in; in service_tx_status_request()
106 ep = &musb->endpoints[epnum].ep_out; in service_tx_status_request()
108 regs = musb->endpoints[epnum].regs; in service_tx_status_request()
139 musb_write_fifo(&musb->endpoints[0], len, result); in service_tx_status_request()
157 service_in_request(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest) in service_in_request() argument
165 handled = service_tx_status_request(musb, in service_in_request()
181 static void musb_g_ep0_giveback(struct musb *musb, struct usb_request *req) in musb_g_ep0_giveback() argument
183 musb_g_giveback(&musb->endpoints[0].ep_in, req, 0); in musb_g_ep0_giveback()
189 static inline void musb_try_b_hnp_enable(struct musb *musb) in musb_try_b_hnp_enable() argument
191 void __iomem *mbase = musb->mregs; in musb_try_b_hnp_enable()
194 dev_dbg(musb->controller, "HNP: Setting HR\n"); in musb_try_b_hnp_enable()
210 service_zero_data_request(struct musb *musb, in service_zero_data_request() argument
212 __releases(musb->lock) in service_zero_data_request()
213 __acquires(musb->lock) in service_zero_data_request()
216 void __iomem *mbase = musb->mregs; in service_zero_data_request()
225 musb->set_address = true; in service_zero_data_request()
226 musb->address = (u8) (ctrlrequest->wValue & 0x7f); in service_zero_data_request()
236 musb->may_wakeup = 0; in service_zero_data_request()
255 ep = musb->endpoints + epnum; in service_zero_data_request()
291 dev_dbg(musb->controller, "restarting the request\n"); in service_zero_data_request()
292 musb_ep_restart(musb, request); in service_zero_data_request()
311 musb->may_wakeup = 1; in service_zero_data_request()
314 if (musb->g.speed != USB_SPEED_HIGH) in service_zero_data_request()
323 musb->test_mode_nr = in service_zero_data_request()
329 musb->test_mode_nr = in service_zero_data_request()
335 musb->test_mode_nr = in service_zero_data_request()
341 musb->test_mode_nr = in service_zero_data_request()
348 musb->test_mode_nr = in service_zero_data_request()
354 musb->test_mode_nr = in service_zero_data_request()
360 musb->test_mode_nr = in service_zero_data_request()
366 musb->test_mode_nr = in service_zero_data_request()
375 musb->test_mode = true; in service_zero_data_request()
378 if (!musb->g.is_otg) in service_zero_data_request()
380 musb->g.b_hnp_enable = 1; in service_zero_data_request()
381 musb_try_b_hnp_enable(musb); in service_zero_data_request()
384 if (!musb->g.is_otg) in service_zero_data_request()
386 musb->g.a_hnp_support = 1; in service_zero_data_request()
389 if (!musb->g.is_otg) in service_zero_data_request()
391 musb->g.a_alt_hnp_support = 1; in service_zero_data_request()
419 ep = musb->endpoints + epnum; in service_zero_data_request()
470 static void ep0_rxstate(struct musb *musb) in ep0_rxstate() argument
472 void __iomem *regs = musb->control_ep->regs; in ep0_rxstate()
477 request = next_ep0_request(musb); in ep0_rxstate()
493 musb_read_fifo(&musb->endpoints[0], count, buf); in ep0_rxstate()
497 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN; in ep0_rxstate()
509 musb->ackpend = csr; in ep0_rxstate()
510 musb_g_ep0_giveback(musb, req); in ep0_rxstate()
511 if (!musb->ackpend) in ep0_rxstate()
513 musb->ackpend = 0; in ep0_rxstate()
515 musb_ep_select(musb->mregs, 0); in ep0_rxstate()
525 static void ep0_txstate(struct musb *musb) in ep0_txstate() argument
527 void __iomem *regs = musb->control_ep->regs; in ep0_txstate()
528 struct musb_request *req = next_ep0_request(musb); in ep0_txstate()
536 dev_dbg(musb->controller, "odd; csr0 %04x\n", musb_readw(regs, MUSB_CSR0)); in ep0_txstate()
546 musb_write_fifo(&musb->endpoints[0], fifo_count, fifo_src); in ep0_txstate()
553 musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT; in ep0_txstate()
559 musb_ep_select(musb->mregs, 0); in ep0_txstate()
568 musb->ackpend = csr; in ep0_txstate()
569 musb_g_ep0_giveback(musb, request); in ep0_txstate()
570 if (!musb->ackpend) in ep0_txstate()
572 musb->ackpend = 0; in ep0_txstate()
583 musb_read_setup(struct musb *musb, struct usb_ctrlrequest *req) in musb_read_setup() argument
586 void __iomem *regs = musb->control_ep->regs; in musb_read_setup()
588 musb_read_fifo(&musb->endpoints[0], sizeof *req, (u8 *)req); in musb_read_setup()
593 dev_dbg(musb->controller, "SETUP req%02x.%02x v%04x i%04x l%d\n", in musb_read_setup()
601 r = next_ep0_request(musb); in musb_read_setup()
603 musb_g_ep0_giveback(musb, &r->request); in musb_read_setup()
613 musb->set_address = false; in musb_read_setup()
614 musb->ackpend = MUSB_CSR0_P_SVDRXPKTRDY; in musb_read_setup()
617 musb->ackpend |= MUSB_CSR0_TXPKTRDY; in musb_read_setup()
618 musb->ep0_state = MUSB_EP0_STAGE_ACKWAIT; in musb_read_setup()
620 musb->ep0_state = MUSB_EP0_STAGE_TX; in musb_read_setup()
625 musb->ackpend = 0; in musb_read_setup()
627 musb->ep0_state = MUSB_EP0_STAGE_RX; in musb_read_setup()
631 forward_to_driver(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest) in forward_to_driver() argument
632 __releases(musb->lock) in forward_to_driver()
633 __acquires(musb->lock) in forward_to_driver()
636 if (!musb->gadget_driver) in forward_to_driver()
638 spin_unlock(&musb->lock); in forward_to_driver()
639 retval = musb->gadget_driver->setup(&musb->g, ctrlrequest); in forward_to_driver()
640 spin_lock(&musb->lock); in forward_to_driver()
649 irqreturn_t musb_g_ep0_irq(struct musb *musb) in musb_g_ep0_irq() argument
653 void __iomem *mbase = musb->mregs; in musb_g_ep0_irq()
654 void __iomem *regs = musb->endpoints[0].regs; in musb_g_ep0_irq()
661 dev_dbg(musb->controller, "csr %04x, count %d, myaddr %d, ep0stage %s\n", in musb_g_ep0_irq()
664 decode_ep0stage(musb->ep0_state)); in musb_g_ep0_irq()
679 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_irq()
688 switch (musb->ep0_state) { in musb_g_ep0_irq()
690 musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT; in musb_g_ep0_irq()
693 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN; in musb_g_ep0_irq()
697 decode_ep0stage(musb->ep0_state)); in musb_g_ep0_irq()
707 switch (musb->ep0_state) { in musb_g_ep0_irq()
712 ep0_txstate(musb); in musb_g_ep0_irq()
720 ep0_rxstate(musb); in musb_g_ep0_irq()
733 if (musb->set_address) { in musb_g_ep0_irq()
734 musb->set_address = false; in musb_g_ep0_irq()
735 musb_writeb(mbase, MUSB_FADDR, musb->address); in musb_g_ep0_irq()
739 else if (musb->test_mode) { in musb_g_ep0_irq()
740 dev_dbg(musb->controller, "entering TESTMODE\n"); in musb_g_ep0_irq()
742 if (MUSB_TEST_PACKET == musb->test_mode_nr) in musb_g_ep0_irq()
743 musb_load_testpacket(musb); in musb_g_ep0_irq()
746 musb->test_mode_nr); in musb_g_ep0_irq()
755 req = next_ep0_request(musb); in musb_g_ep0_irq()
757 musb_g_ep0_giveback(musb, &req->request); in musb_g_ep0_irq()
768 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_irq()
779 musb->ep0_state = MUSB_EP0_STAGE_SETUP; in musb_g_ep0_irq()
792 musb_read_setup(musb, &setup); in musb_g_ep0_irq()
796 if (unlikely(musb->g.speed == USB_SPEED_UNKNOWN)) { in musb_g_ep0_irq()
803 musb->g.speed = (power & MUSB_POWER_HSMODE) in musb_g_ep0_irq()
808 switch (musb->ep0_state) { in musb_g_ep0_irq()
817 musb, &setup); in musb_g_ep0_irq()
825 musb->ackpend |= MUSB_CSR0_P_DATAEND; in musb_g_ep0_irq()
829 musb->ep0_state = in musb_g_ep0_irq()
838 handled = service_in_request(musb, &setup); in musb_g_ep0_irq()
840 musb->ackpend = MUSB_CSR0_TXPKTRDY in musb_g_ep0_irq()
842 musb->ep0_state = in musb_g_ep0_irq()
852 dev_dbg(musb->controller, "handled %d, csr %04x, ep0stage %s\n", in musb_g_ep0_irq()
854 decode_ep0stage(musb->ep0_state)); in musb_g_ep0_irq()
865 handled = forward_to_driver(musb, &setup); in musb_g_ep0_irq()
869 dev_dbg(musb->controller, "stall (%d)\n", handled); in musb_g_ep0_irq()
870 musb->ackpend |= MUSB_CSR0_P_SENDSTALL; in musb_g_ep0_irq()
871 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_irq()
874 musb->ackpend); in musb_g_ep0_irq()
875 musb->ackpend = 0; in musb_g_ep0_irq()
891 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_irq()
917 struct musb *musb; in musb_g_ep0_queue() local
926 musb = ep->musb; in musb_g_ep0_queue()
927 regs = musb->control_ep->regs; in musb_g_ep0_queue()
930 req->musb = musb; in musb_g_ep0_queue()
935 spin_lock_irqsave(&musb->lock, lockflags); in musb_g_ep0_queue()
942 switch (musb->ep0_state) { in musb_g_ep0_queue()
949 dev_dbg(musb->controller, "ep0 request queued in state %d\n", in musb_g_ep0_queue()
950 musb->ep0_state); in musb_g_ep0_queue()
958 dev_dbg(musb->controller, "queue to %s (%s), length=%d\n", in musb_g_ep0_queue()
962 musb_ep_select(musb->mregs, 0); in musb_g_ep0_queue()
965 if (musb->ep0_state == MUSB_EP0_STAGE_TX) in musb_g_ep0_queue()
966 ep0_txstate(musb); in musb_g_ep0_queue()
969 else if (musb->ep0_state == MUSB_EP0_STAGE_ACKWAIT) { in musb_g_ep0_queue()
973 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN; in musb_g_ep0_queue()
975 musb->ackpend | MUSB_CSR0_P_DATAEND); in musb_g_ep0_queue()
976 musb->ackpend = 0; in musb_g_ep0_queue()
977 musb_g_ep0_giveback(ep->musb, r); in musb_g_ep0_queue()
984 } else if (musb->ackpend) { in musb_g_ep0_queue()
985 musb_writew(regs, MUSB_CSR0, musb->ackpend); in musb_g_ep0_queue()
986 musb->ackpend = 0; in musb_g_ep0_queue()
990 spin_unlock_irqrestore(&musb->lock, lockflags); in musb_g_ep0_queue()
1003 struct musb *musb; in musb_g_ep0_halt() local
1013 musb = ep->musb; in musb_g_ep0_halt()
1014 base = musb->mregs; in musb_g_ep0_halt()
1015 regs = musb->control_ep->regs; in musb_g_ep0_halt()
1018 spin_lock_irqsave(&musb->lock, flags); in musb_g_ep0_halt()
1026 csr = musb->ackpend; in musb_g_ep0_halt()
1028 switch (musb->ep0_state) { in musb_g_ep0_halt()
1047 musb->ep0_state = MUSB_EP0_STAGE_IDLE; in musb_g_ep0_halt()
1048 musb->ackpend = 0; in musb_g_ep0_halt()
1051 dev_dbg(musb->controller, "ep0 can't halt in state %d\n", musb->ep0_state); in musb_g_ep0_halt()
1056 spin_unlock_irqrestore(&musb->lock, flags); in musb_g_ep0_halt()