Lines Matching refs:ctrl
68 static void nx_display_parse_dp_ctrl(ofnode node, struct dp_ctrl_info *ctrl) in nx_display_parse_dp_ctrl() argument
71 ctrl->clk_src_lv0 = ofnode_read_s32_default(node, "clk_src_lv0", 0); in nx_display_parse_dp_ctrl()
72 ctrl->clk_div_lv0 = ofnode_read_s32_default(node, "clk_div_lv0", 0); in nx_display_parse_dp_ctrl()
73 ctrl->clk_src_lv1 = ofnode_read_s32_default(node, "clk_src_lv1", 0); in nx_display_parse_dp_ctrl()
74 ctrl->clk_div_lv1 = ofnode_read_s32_default(node, "clk_div_lv1", 0); in nx_display_parse_dp_ctrl()
77 ctrl->interlace = ofnode_read_s32_default(node, "interlace", 0); in nx_display_parse_dp_ctrl()
80 ctrl->out_format = ofnode_read_s32_default(node, "out_format", 0); in nx_display_parse_dp_ctrl()
81 ctrl->invert_field = ofnode_read_s32_default(node, "invert_field", 0); in nx_display_parse_dp_ctrl()
82 ctrl->swap_RB = ofnode_read_s32_default(node, "swap_RB", 0); in nx_display_parse_dp_ctrl()
83 ctrl->yc_order = ofnode_read_s32_default(node, "yc_order", 0); in nx_display_parse_dp_ctrl()
86 ctrl->delay_mask = ofnode_read_s32_default(node, "delay_mask", 0); in nx_display_parse_dp_ctrl()
87 ctrl->d_rgb_pvd = ofnode_read_s32_default(node, "d_rgb_pvd", 0); in nx_display_parse_dp_ctrl()
88 ctrl->d_hsync_cp1 = ofnode_read_s32_default(node, "d_hsync_cp1", 0); in nx_display_parse_dp_ctrl()
89 ctrl->d_vsync_fram = ofnode_read_s32_default(node, "d_vsync_fram", 0); in nx_display_parse_dp_ctrl()
90 ctrl->d_de_cp2 = ofnode_read_s32_default(node, "d_de_cp2", 0); in nx_display_parse_dp_ctrl()
93 ctrl->vs_start_offset = in nx_display_parse_dp_ctrl()
95 ctrl->vs_end_offset = ofnode_read_s32_default(node, "vs_end_offset", 0); in nx_display_parse_dp_ctrl()
96 ctrl->ev_start_offset = in nx_display_parse_dp_ctrl()
98 ctrl->ev_end_offset = ofnode_read_s32_default(node, "ev_end_offset", 0); in nx_display_parse_dp_ctrl()
101 ctrl->vck_select = ofnode_read_s32_default(node, "vck_select", 0); in nx_display_parse_dp_ctrl()
102 ctrl->clk_inv_lv0 = ofnode_read_s32_default(node, "clk_inv_lv0", 0); in nx_display_parse_dp_ctrl()
103 ctrl->clk_delay_lv0 = ofnode_read_s32_default(node, "clk_delay_lv0", 0); in nx_display_parse_dp_ctrl()
104 ctrl->clk_inv_lv1 = ofnode_read_s32_default(node, "clk_inv_lv1", 0); in nx_display_parse_dp_ctrl()
105 ctrl->clk_delay_lv1 = ofnode_read_s32_default(node, "clk_delay_lv1", 0); in nx_display_parse_dp_ctrl()
106 ctrl->clk_sel_div1 = ofnode_read_s32_default(node, "clk_sel_div1", 0); in nx_display_parse_dp_ctrl()
109 ctrl->interlace ? "Interlace" : " Progressive"); in nx_display_parse_dp_ctrl()
111 ctrl->clk_src_lv0, ctrl->clk_div_lv0, in nx_display_parse_dp_ctrl()
112 ctrl->clk_src_lv1, ctrl->clk_div_lv1); in nx_display_parse_dp_ctrl()
114 ctrl->out_format, ctrl->invert_field, in nx_display_parse_dp_ctrl()
115 ctrl->swap_RB, ctrl->yc_order); in nx_display_parse_dp_ctrl()
117 ctrl->delay_mask, ctrl->d_rgb_pvd, in nx_display_parse_dp_ctrl()
118 ctrl->d_hsync_cp1, ctrl->d_vsync_fram, ctrl->d_de_cp2); in nx_display_parse_dp_ctrl()
120 ctrl->vs_start_offset, ctrl->vs_end_offset, in nx_display_parse_dp_ctrl()
121 ctrl->ev_start_offset, ctrl->ev_end_offset); in nx_display_parse_dp_ctrl()
123 ctrl->vck_select, ctrl->clk_inv_lv0, ctrl->clk_delay_lv0, in nx_display_parse_dp_ctrl()
124 ctrl->clk_inv_lv1, ctrl->clk_delay_lv1, ctrl->clk_sel_div1); in nx_display_parse_dp_ctrl()
361 nx_display_parse_dp_ctrl(subnode, &dp->ctrl); in nx_display_parse_dt()
442 &dp->sync, &dp->ctrl, &dp->top, in nx_display_setup()
449 &dp->sync, &dp->ctrl, &dp->top, in nx_display_setup()
456 &dp->sync, &dp->ctrl, &dp->top, in nx_display_setup()
463 &dp->sync, &dp->ctrl, &dp->top, in nx_display_setup()