Lines Matching defs:andes_pcu
23 struct andes_pcu { struct
24 unsigned int rev; /* 0x00 - PCU Revision */
25 unsigned int spinfo; /* 0x04 - Scratch Pad Info */
26 unsigned int rsvd1[2]; /* 0x08-0x0C: Reserved */
27 unsigned int soc_id; /* 0x10 - SoC ID */
28 unsigned int soc_ahb; /* 0x14 - SoC AHB configuration */
29 unsigned int soc_apb; /* 0x18 - SoC APB configuration */
30 unsigned int rsvd2; /* 0x1C */
31 unsigned int dcsrcr0; /* 0x20 - Driving Capability
33 unsigned int dcsrcr1; /* 0x24 - Driving Capability
35 unsigned int dcsrcr2; /* 0x28 - Driving Capability
37 unsigned int rsvd3; /* 0x2C */
38 unsigned int mfpsr0; /* 0x30 - Multi-Func Port Setting 0 */
39 unsigned int mfpsr1; /* 0x34 - Multi-Func Port Setting 1 */
40 unsigned int dmaes; /* 0x38 - DMA Engine Selection */
41 unsigned int rsvd4; /* 0x3C */
42 unsigned int oscc; /* 0x40 - OSC Control */
43 unsigned int pwmcd; /* 0x44 - PWM Clock divider */
44 unsigned int socmisc; /* 0x48 - SoC Misc. */
45 unsigned int rsvd5[13]; /* 0x4C-0x7C: Reserved */
46 unsigned int bsmcr; /* 0x80 - BSM Controrl */
47 unsigned int bsmst; /* 0x84 - BSM Status */
48 unsigned int wes; /* 0x88 - Wakeup Event Sensitivity*/
49 unsigned int west; /* 0x8C - Wakeup Event Status */
50 unsigned int rsttiming; /* 0x90 - Reset Timing */
51 unsigned int intr_st; /* 0x94 - PCU Interrupt Status */
52 unsigned int rsvd6[2]; /* 0x98-0x9C: Reserved */
53 struct pcs pcs1; /* 0xA0-0xB0: PCS1 (clock scaling) */
54 unsigned int pcsrsvd1[3]; /* 0xB4-0xBC: Reserved */
55 struct pcs pcs2; /* 0xC0-0xD0: PCS2 (AHB clock gating) */
56 unsigned int pcsrsvd2[3]; /* 0xD4-0xDC: Reserved */
57 struct pcs pcs3; /* 0xE0-0xF0: PCS3 (APB clock gating) */
58 unsigned int pcsrsvd3[3]; /* 0xF4-0xFC: Reserved */
59 struct pcs pcs4; /* 0x100-0x110: PCS4 main PLL scaling */
60 unsigned int pcsrsvd4[3]; /* 0x114-0x11C: Reserved */
61 struct pcs pcs5; /* 0x120-0x130: PCS5 PCI PLL scaling */
62 unsigned int pcsrsvd5[3]; /* 0x134-0x13C: Reserved */
63 struct pcs pcs6; /* 0x140-0x150: PCS6 AC97 PLL scaling */
64 unsigned int pcsrsvd6[3]; /* 0x154-0x15C: Reserved */
65 struct pcs pcs7; /* 0x160-0x170: PCS7 GMAC PLL scaling */
66 unsigned int pcsrsvd7[3]; /* 0x174-0x17C: Reserved */
67 struct pcs pcs8; /* 0x180-0x190: PCS8 voltage scaling */
68 unsigned int pcsrsvd8[3]; /* 0x194-0x19C: Reserved */
69 struct pcs pcs9; /* 0x1A0-0x1B0: PCS9 power control */
70 unsigned int pcsrsvd9[93]; /* 0x1B4-0x3FC: Reserved */
71 unsigned int pmspdm[40]; /* 0x400-0x4fC: Power Manager