1menu "Generic Driver Options"
2
3config DM
4	bool "Enable Driver Model"
5	help
6	  This config option enables Driver Model. This brings in the core
7	  support, including scanning of platform data on start-up. If
8	  CONFIG_OF_CONTROL is enabled, the device tree will be scanned also
9	  when available.
10
11config SPL_DM
12	bool "Enable Driver Model for SPL"
13	depends on DM && SPL
14	help
15	  Enable driver model in SPL. You will need to provide a
16	  suitable malloc() implementation. If you are not using the
17	  full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START,
18	  consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you
19	  must provide CONFIG_SPL_SYS_MALLOC_F_LEN to set the size.
20	  In most cases driver model will only allocate a few uclasses
21	  and devices in SPL, so 1KB should be enable. See
22	  CONFIG_SPL_SYS_MALLOC_F_LEN for more details on how to enable it.
23
24config TPL_DM
25	bool "Enable Driver Model for TPL"
26	depends on DM && TPL
27	help
28	  Enable driver model in TPL. You will need to provide a
29	  suitable malloc() implementation. If you are not using the
30	  full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START,
31	  consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you
32	  must provide CONFIG_SPL_SYS_MALLOC_F_LEN to set the size.
33	  In most cases driver model will only allocate a few uclasses
34	  and devices in SPL, so 1KB should be enough. See
35	  CONFIG_SPL_SYS_MALLOC_F_LEN for more details on how to enable it.
36	  Disable this for very small implementations.
37
38config DM_WARN
39	bool "Enable warnings in driver model"
40	depends on DM
41	default y
42	help
43	  Enable this to see warnings related to driver model.
44
45	  Warnings may help with debugging, such as when expected devices do
46	  not bind correctly. If the option is disabled, dm_warn() is compiled
47	  out - it will do nothing when called.
48
49config SPL_DM_WARN
50	bool "Enable warnings in driver model wuth SPL"
51	depends on SPL_DM
52	help
53	  Enable this to see warnings related to driver model in SPL
54
55	  The dm_warn() function can use up quite a bit of space for its
56	  strings. By default this is disabled for SPL builds to save space.
57
58	  Warnings may help with debugging, such as when expected devices do
59	  not bind correctly. If the option is disabled, dm_warn() is compiled
60	  out - it will do nothing when called.
61
62config DM_DEBUG
63	bool "Enable debug messages in driver model core"
64	depends on DM
65	help
66	  Say Y here if you want to compile in debug messages in DM core.
67
68config DM_DEVICE_REMOVE
69	bool "Support device removal"
70	depends on DM
71	default y
72	help
73	  We can save some code space by dropping support for removing a
74	  device.
75
76	  Note that this may have undesirable results in the USB subsystem as
77	  it causes unplugged devices to linger around in the dm-tree, and it
78	  causes USB host controllers to not be stopped when booting the OS.
79
80config SPL_DM_DEVICE_REMOVE
81	bool "Support device removal in SPL"
82	depends on SPL_DM
83	default n
84	help
85	  We can save some code space by dropping support for removing a
86	  device. This is not normally required in SPL, so by default this
87	  option is disabled for SPL.
88
89config DM_STDIO
90	bool "Support stdio registration"
91	depends on DM
92	default y
93	help
94	  Normally serial drivers register with stdio so that they can be used
95	  as normal output devices. In SPL we don't normally use stdio, so
96	  we can omit this feature.
97
98config DM_SEQ_ALIAS
99	bool "Support numbered aliases in device tree"
100	depends on DM
101	default y
102	help
103	  Most boards will have a '/aliases' node containing the path to
104	  numbered devices (e.g. serial0 = &serial0). This feature can be
105	  disabled if it is not required.
106
107config SPL_DM_SEQ_ALIAS
108	bool "Support numbered aliases in device tree in SPL"
109	depends on SPL_DM
110	default n
111	help
112	  Most boards will have a '/aliases' node containing the path to
113	  numbered devices (e.g. serial0 = &serial0). This feature can be
114	  disabled if it is not required, to save code space in SPL.
115
116config SPL_DM_INLINE_OFNODE
117	bool "Inline some ofnode functions which are seldom used in SPL"
118	depends on SPL_DM
119	default y
120	help
121	  This applies to several ofnode functions (see ofnode.h) which are
122	  seldom used. Inlining them can help reduce code size.
123
124config TPL_DM_INLINE_OFNODE
125	bool "Inline some ofnode functions which are seldom used in TPL"
126	depends on TPL_DM
127	default y
128	help
129	  This applies to several ofnode functions (see ofnode.h) which are
130	  seldom used. Inlining them can help reduce code size.
131
132config DM_DMA
133	bool "Support per-device DMA constraints"
134	depends on DM
135	default n
136	help
137	  Enable this to extract per-device DMA constraints, only supported on
138	  device-tree systems for now. This is needed in order translate
139	  addresses on systems where different buses have different views of
140	  the physical address space.
141
142config REGMAP
143	bool "Support register maps"
144	depends on DM
145	help
146	  Hardware peripherals tend to have one or more sets of registers
147	  which can be accessed to control the hardware. A register map
148	  models this with a simple read/write interface. It can in principle
149	  support any bus type (I2C, SPI) but so far this only supports
150	  direct memory access.
151
152config SPL_REGMAP
153	bool "Support register maps in SPL"
154	depends on SPL_DM
155	help
156	  Hardware peripherals tend to have one or more sets of registers
157	  which can be accessed to control the hardware. A register map
158	  models this with a simple read/write interface. It can in principle
159	  support any bus type (I2C, SPI) but so far this only supports
160	  direct memory access.
161
162config TPL_REGMAP
163	bool "Support register maps in TPL"
164	depends on TPL_DM
165	help
166	  Hardware peripherals tend to have one or more sets of registers
167	  which can be accessed to control the hardware. A register map
168	  models this with a simple read/write interface. It can in principle
169	  support any bus type (I2C, SPI) but so far this only supports
170	  direct memory access.
171
172config SYSCON
173	bool "Support system controllers"
174	depends on REGMAP
175	help
176	  Many SoCs have a number of system controllers which are dealt with
177	  as a group by a single driver. Some common functionality is provided
178	  by this uclass, including accessing registers via regmap and
179	  assigning a unique number to each.
180
181config SPL_SYSCON
182	bool "Support system controllers in SPL"
183	depends on SPL_REGMAP
184	help
185	  Many SoCs have a number of system controllers which are dealt with
186	  as a group by a single driver. Some common functionality is provided
187	  by this uclass, including accessing registers via regmap and
188	  assigning a unique number to each.
189
190config TPL_SYSCON
191	bool "Support system controllers in TPL"
192	depends on TPL_REGMAP
193	help
194	  Many SoCs have a number of system controllers which are dealt with
195	  as a group by a single driver. Some common functionality is provided
196	  by this uclass, including accessing registers via regmap and
197	  assigning a unique number to each.
198
199config DEVRES
200	bool "Managed device resources"
201	depends on DM
202	help
203	  This option enables the Managed device resources core support.
204	  Device resources managed by the devres framework are automatically
205	  released whether initialization fails half-way or the device gets
206	  detached.
207
208	  If this option is disabled, devres functions fall back to
209	  non-managed variants.  For example, devres_alloc() to kzalloc(),
210	  devm_kmalloc() to kmalloc(), etc.
211
212config DEBUG_DEVRES
213	bool "Managed device resources debugging functions"
214	depends on DEVRES
215	help
216	  If this option is enabled, devres debug messages are printed.
217	  Also, a function is available to dump a list of device resources.
218	  Select this if you are having a problem with devres or want to
219	  debug resource management for a managed device.
220
221	  If you are unsure about this, Say N here.
222
223config SIMPLE_BUS
224	bool "Support simple-bus driver"
225	depends on DM && OF_CONTROL
226	default y
227	help
228	  Supports the 'simple-bus' driver, which is used on some systems.
229
230config SPL_SIMPLE_BUS
231	bool "Support simple-bus driver in SPL"
232	depends on SPL_DM && SPL_OF_CONTROL
233	default y
234	help
235	  Supports the 'simple-bus' driver, which is used on some systems
236	  in SPL.
237
238config SIMPLE_PM_BUS
239	bool "Support simple-pm-bus driver"
240	depends on DM && OF_CONTROL && CLK && POWER_DOMAIN
241	help
242	  Supports the 'simple-pm-bus' driver, which is used for busses that
243	  have power domains and/or clocks which need to be enabled before use.
244
245config OF_TRANSLATE
246	bool "Translate addresses using fdt_translate_address"
247	depends on DM && OF_CONTROL
248	default y
249	help
250	  If this option is enabled, the reg property will be translated
251	  using the fdt_translate_address() function. This is necessary
252	  on some platforms (e.g. MVEBU) using complex "ranges"
253	  properties in many nodes. As this translation is not handled
254	  correctly in the default simple_bus_translate() function.
255
256	  If this option is not enabled, simple_bus_translate() will be
257	  used for the address translation. This function is faster and
258	  smaller in size than fdt_translate_address().
259
260config OF_TRANSLATE_ZERO_SIZE_CELLS
261	bool "Enable translation for zero size cells"
262	depends on OF_TRANSLATE
263	default n
264	help
265	  The routine used to translate an FDT address into a physical CPU
266	  address was developed by IBM. It considers that crossing any level
267	  with #size-cells = <0> makes translation impossible, even if it is
268	  not the way it was specified.
269	  Enabling this option makes translation possible even in the case
270	  of crossing levels with #size-cells = <0>.
271
272config SPL_OF_TRANSLATE
273	bool "Translate addresses using fdt_translate_address in SPL"
274	depends on SPL_DM && SPL_OF_CONTROL
275	default n
276	help
277	  If this option is enabled, the reg property will be translated
278	  using the fdt_translate_address() function. This is necessary
279	  on some platforms (e.g. MVEBU) using complex "ranges"
280	  properties in many nodes. As this translation is not handled
281	  correctly in the default simple_bus_translate() function.
282
283	  If this option is not enabled, simple_bus_translate() will be
284	  used for the address translation. This function is faster and
285	  smaller in size than fdt_translate_address().
286
287config TRANSLATION_OFFSET
288	bool "Platforms specific translation offset"
289	depends on DM && OF_CONTROL
290	help
291	  Some platforms need a special address translation. Those
292	  platforms (e.g. mvebu in SPL) can configure a translation
293	  offset by enabling this option and setting the translation_offset
294	  variable in the GD in their platform- / board-specific code.
295
296config OF_ISA_BUS
297	bool
298	depends on OF_TRANSLATE
299	help
300	  Is this option is enabled then support for the ISA bus will
301	  be included for addresses read from DT. This is something that
302	  should be known to be required or not based upon the board
303	  being targeted, and whether or not it makes use of an ISA bus.
304
305	  The bus is matched based upon its node name equalling "isa". The
306	  busses #address-cells should equal 2, with the first cell being
307	  used to hold flags & flag 0x1 indicating that the address range
308	  should be accessed using I/O port in/out accessors. The second
309	  cell holds the offset into ISA bus address space. The #size-cells
310	  property should equal 1, and of course holds the size of the
311	  address range used by a device.
312
313	  If this option is not enabled then support for the ISA bus is
314	  not included and any such busses used in DT will be treated as
315	  typical simple-bus compatible busses. This will lead to
316	  mistranslation of device addresses, so ensure that this is
317	  enabled if your board does include an ISA bus.
318
319config DM_DEV_READ_INLINE
320	bool
321	default y if !OF_LIVE
322
323config ACPIGEN
324	bool "Support ACPI table generation in driver model"
325	default y if SANDBOX || (GENERATE_ACPI_TABLE && !QEMU)
326	help
327	  This option enables generation of ACPI tables using driver-model
328	  devices. It adds a new operation struct to each driver, to support
329	  things like generating device-specific tables and returning the ACPI
330	  name of a device.
331
332config BOUNCE_BUFFER
333	bool "Include bounce buffer API"
334	help
335	  Some peripherals support DMA from a subset of physically
336	  addressable memory only.  To support such peripherals, the
337	  bounce buffer API uses a temporary buffer: it copies data
338	  to/from DMA regions while managing cache operations.
339
340	  A second possible use of bounce buffers is their ability to
341	  provide aligned buffers for DMA operations.
342
343endmenu
344