1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 */
5
6 #ifndef ATH11K_CORE_H
7 #define ATH11K_CORE_H
8
9 #include <linux/types.h>
10 #include <linux/interrupt.h>
11 #include <linux/irq.h>
12 #include <linux/bitfield.h>
13 #include "qmi.h"
14 #include "htc.h"
15 #include "wmi.h"
16 #include "hal.h"
17 #include "dp.h"
18 #include "ce.h"
19 #include "mac.h"
20 #include "hw.h"
21 #include "hal_rx.h"
22 #include "reg.h"
23 #include "thermal.h"
24 #include "dbring.h"
25 #include "spectral.h"
26
27 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
28
29 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512
30
31 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
32
33 /* Pending management packets threshold for dropping probe responses */
34 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
35
36 #define ATH11K_INVALID_HW_MAC_ID 0xFF
37 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ)
38
39 extern unsigned int ath11k_frame_mode;
40
41 #define ATH11K_MON_TIMER_INTERVAL 10
42
43 enum ath11k_supported_bw {
44 ATH11K_BW_20 = 0,
45 ATH11K_BW_40 = 1,
46 ATH11K_BW_80 = 2,
47 ATH11K_BW_160 = 3,
48 };
49
50 enum wme_ac {
51 WME_AC_BE,
52 WME_AC_BK,
53 WME_AC_VI,
54 WME_AC_VO,
55 WME_NUM_AC
56 };
57
58 #define ATH11K_HT_MCS_MAX 7
59 #define ATH11K_VHT_MCS_MAX 9
60 #define ATH11K_HE_MCS_MAX 11
61
62 enum ath11k_crypt_mode {
63 /* Only use hardware crypto engine */
64 ATH11K_CRYPT_MODE_HW,
65 /* Only use software crypto */
66 ATH11K_CRYPT_MODE_SW,
67 };
68
ath11k_tid_to_ac(u32 tid)69 static inline enum wme_ac ath11k_tid_to_ac(u32 tid)
70 {
71 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
72 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
73 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
74 WME_AC_VO);
75 }
76
77 enum ath11k_skb_flags {
78 ATH11K_SKB_HW_80211_ENCAP = BIT(0),
79 ATH11K_SKB_CIPHER_SET = BIT(1),
80 };
81
82 struct ath11k_skb_cb {
83 dma_addr_t paddr;
84 u8 eid;
85 u8 flags;
86 u32 cipher;
87 struct ath11k *ar;
88 struct ieee80211_vif *vif;
89 } __packed;
90
91 struct ath11k_skb_rxcb {
92 dma_addr_t paddr;
93 bool is_first_msdu;
94 bool is_last_msdu;
95 bool is_continuation;
96 bool is_mcbc;
97 bool is_eapol;
98 struct hal_rx_desc *rx_desc;
99 u8 err_rel_src;
100 u8 err_code;
101 u8 mac_id;
102 u8 unmapped;
103 u8 is_frag;
104 u8 tid;
105 u16 peer_id;
106 u16 seq_no;
107 };
108
109 enum ath11k_hw_rev {
110 ATH11K_HW_IPQ8074,
111 ATH11K_HW_QCA6390_HW20,
112 ATH11K_HW_IPQ6018_HW10,
113 ATH11K_HW_QCN9074_HW10,
114 ATH11K_HW_WCN6855_HW20,
115 };
116
117 enum ath11k_firmware_mode {
118 /* the default mode, standard 802.11 functionality */
119 ATH11K_FIRMWARE_MODE_NORMAL,
120
121 /* factory tests etc */
122 ATH11K_FIRMWARE_MODE_FTM,
123
124 /* Cold boot calibration */
125 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7,
126 };
127
128 extern bool ath11k_cold_boot_cal;
129
130 #define ATH11K_IRQ_NUM_MAX 52
131 #define ATH11K_EXT_IRQ_NUM_MAX 16
132
133 struct ath11k_ext_irq_grp {
134 struct ath11k_base *ab;
135 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX];
136 u32 num_irq;
137 u32 grp_id;
138 u64 timestamp;
139 struct napi_struct napi;
140 struct net_device napi_ndev;
141 };
142
143 #define HEHANDLE_CAP_PHYINFO_SIZE 3
144 #define HECAP_PHYINFO_SIZE 9
145 #define HECAP_MACINFO_SIZE 5
146 #define HECAP_TXRX_MCS_NSS_SIZE 2
147 #define HECAP_PPET16_PPET8_MAX_SIZE 25
148
149 #define HE_PPET16_PPET8_SIZE 8
150
151 /* 802.11ax PPE (PPDU packet Extension) threshold */
152 struct he_ppe_threshold {
153 u32 numss_m1;
154 u32 ru_mask;
155 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
156 };
157
158 struct ath11k_he {
159 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
160 u32 hecap_rxmcsnssmap;
161 u32 hecap_txmcsnssmap;
162 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
163 struct he_ppe_threshold hecap_ppet;
164 u32 heop_param;
165 };
166
167 #define MAX_RADIOS 3
168
169 enum {
170 WMI_HOST_TP_SCALE_MAX = 0,
171 WMI_HOST_TP_SCALE_50 = 1,
172 WMI_HOST_TP_SCALE_25 = 2,
173 WMI_HOST_TP_SCALE_12 = 3,
174 WMI_HOST_TP_SCALE_MIN = 4,
175 WMI_HOST_TP_SCALE_SIZE = 5,
176 };
177
178 enum ath11k_scan_state {
179 ATH11K_SCAN_IDLE,
180 ATH11K_SCAN_STARTING,
181 ATH11K_SCAN_RUNNING,
182 ATH11K_SCAN_ABORTING,
183 };
184
185 enum ath11k_dev_flags {
186 ATH11K_CAC_RUNNING,
187 ATH11K_FLAG_CORE_REGISTERED,
188 ATH11K_FLAG_CRASH_FLUSH,
189 ATH11K_FLAG_RAW_MODE,
190 ATH11K_FLAG_HW_CRYPTO_DISABLED,
191 ATH11K_FLAG_BTCOEX,
192 ATH11K_FLAG_RECOVERY,
193 ATH11K_FLAG_UNREGISTERING,
194 ATH11K_FLAG_REGISTERED,
195 ATH11K_FLAG_QMI_FAIL,
196 ATH11K_FLAG_HTC_SUSPEND_COMPLETE,
197 };
198
199 enum ath11k_monitor_flags {
200 ATH11K_FLAG_MONITOR_CONF_ENABLED,
201 ATH11K_FLAG_MONITOR_STARTED,
202 ATH11K_FLAG_MONITOR_VDEV_CREATED,
203 };
204
205 struct ath11k_vif {
206 u32 vdev_id;
207 enum wmi_vdev_type vdev_type;
208 enum wmi_vdev_subtype vdev_subtype;
209 u32 beacon_interval;
210 u32 dtim_period;
211 u16 ast_hash;
212 u16 ast_idx;
213 u16 tcl_metadata;
214 u8 hal_addr_search_flags;
215 u8 search_type;
216
217 struct ath11k *ar;
218 struct ieee80211_vif *vif;
219
220 u16 tx_seq_no;
221 struct wmi_wmm_params_all_arg wmm_params;
222 struct list_head list;
223 union {
224 struct {
225 u32 uapsd;
226 } sta;
227 struct {
228 /* 127 stations; wmi limit */
229 u8 tim_bitmap[16];
230 u8 tim_len;
231 u32 ssid_len;
232 u8 ssid[IEEE80211_MAX_SSID_LEN];
233 bool hidden_ssid;
234 /* P2P_IE with NoA attribute for P2P_GO case */
235 u32 noa_len;
236 u8 *noa_data;
237 } ap;
238 } u;
239
240 bool is_started;
241 bool is_up;
242 bool spectral_enabled;
243 u32 aid;
244 u8 bssid[ETH_ALEN];
245 struct cfg80211_bitrate_mask bitrate_mask;
246 struct delayed_work connection_loss_work;
247 int num_legacy_stations;
248 int rtscts_prot_mode;
249 int txpower;
250 bool rsnie_present;
251 bool wpaie_present;
252 struct ieee80211_chanctx_conf chanctx;
253 };
254
255 struct ath11k_vif_iter {
256 u32 vdev_id;
257 struct ath11k_vif *arvif;
258 };
259
260 struct ath11k_rx_peer_stats {
261 u64 num_msdu;
262 u64 num_mpdu_fcs_ok;
263 u64 num_mpdu_fcs_err;
264 u64 tcp_msdu_count;
265 u64 udp_msdu_count;
266 u64 other_msdu_count;
267 u64 ampdu_msdu_count;
268 u64 non_ampdu_msdu_count;
269 u64 stbc_count;
270 u64 beamformed_count;
271 u64 mcs_count[HAL_RX_MAX_MCS + 1];
272 u64 nss_count[HAL_RX_MAX_NSS];
273 u64 bw_count[HAL_RX_BW_MAX];
274 u64 gi_count[HAL_RX_GI_MAX];
275 u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
276 u64 tid_count[IEEE80211_NUM_TIDS + 1];
277 u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
278 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
279 u64 rx_duration;
280 u64 dcm_count;
281 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
282 };
283
284 #define ATH11K_HE_MCS_NUM 12
285 #define ATH11K_VHT_MCS_NUM 10
286 #define ATH11K_BW_NUM 4
287 #define ATH11K_NSS_NUM 4
288 #define ATH11K_LEGACY_NUM 12
289 #define ATH11K_GI_NUM 4
290 #define ATH11K_HT_MCS_NUM 32
291
292 enum ath11k_pkt_rx_err {
293 ATH11K_PKT_RX_ERR_FCS,
294 ATH11K_PKT_RX_ERR_TKIP,
295 ATH11K_PKT_RX_ERR_CRYPT,
296 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL,
297 ATH11K_PKT_RX_ERR_MAX,
298 };
299
300 enum ath11k_ampdu_subfrm_num {
301 ATH11K_AMPDU_SUBFRM_NUM_10,
302 ATH11K_AMPDU_SUBFRM_NUM_20,
303 ATH11K_AMPDU_SUBFRM_NUM_30,
304 ATH11K_AMPDU_SUBFRM_NUM_40,
305 ATH11K_AMPDU_SUBFRM_NUM_50,
306 ATH11K_AMPDU_SUBFRM_NUM_60,
307 ATH11K_AMPDU_SUBFRM_NUM_MORE,
308 ATH11K_AMPDU_SUBFRM_NUM_MAX,
309 };
310
311 enum ath11k_amsdu_subfrm_num {
312 ATH11K_AMSDU_SUBFRM_NUM_1,
313 ATH11K_AMSDU_SUBFRM_NUM_2,
314 ATH11K_AMSDU_SUBFRM_NUM_3,
315 ATH11K_AMSDU_SUBFRM_NUM_4,
316 ATH11K_AMSDU_SUBFRM_NUM_MORE,
317 ATH11K_AMSDU_SUBFRM_NUM_MAX,
318 };
319
320 enum ath11k_counter_type {
321 ATH11K_COUNTER_TYPE_BYTES,
322 ATH11K_COUNTER_TYPE_PKTS,
323 ATH11K_COUNTER_TYPE_MAX,
324 };
325
326 enum ath11k_stats_type {
327 ATH11K_STATS_TYPE_SUCC,
328 ATH11K_STATS_TYPE_FAIL,
329 ATH11K_STATS_TYPE_RETRY,
330 ATH11K_STATS_TYPE_AMPDU,
331 ATH11K_STATS_TYPE_MAX,
332 };
333
334 struct ath11k_htt_data_stats {
335 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM];
336 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM];
337 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM];
338 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM];
339 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM];
340 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM];
341 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM];
342 };
343
344 struct ath11k_htt_tx_stats {
345 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX];
346 u64 tx_duration;
347 u64 ba_fails;
348 u64 ack_fails;
349 };
350
351 struct ath11k_per_ppdu_tx_stats {
352 u16 succ_pkts;
353 u16 failed_pkts;
354 u16 retry_pkts;
355 u32 succ_bytes;
356 u32 failed_bytes;
357 u32 retry_bytes;
358 };
359
360 struct ath11k_sta {
361 struct ath11k_vif *arvif;
362
363 /* the following are protected by ar->data_lock */
364 u32 changed; /* IEEE80211_RC_* */
365 u32 bw;
366 u32 nss;
367 u32 smps;
368 enum hal_pn_type pn_type;
369
370 struct work_struct update_wk;
371 struct work_struct set_4addr_wk;
372 struct rate_info txrate;
373 struct rate_info last_txrate;
374 u64 rx_duration;
375 u64 tx_duration;
376 u8 rssi_comb;
377 struct ath11k_htt_tx_stats *tx_stats;
378 struct ath11k_rx_peer_stats *rx_stats;
379
380 #ifdef CONFIG_MAC80211_DEBUGFS
381 /* protected by conf_mutex */
382 bool aggr_mode;
383 #endif
384
385 bool use_4addr_set;
386 u16 tcl_metadata;
387 };
388
389 #define ATH11K_MIN_5G_FREQ 4150
390 #define ATH11K_MIN_6G_FREQ 5925
391 #define ATH11K_MAX_6G_FREQ 7115
392 #define ATH11K_NUM_CHANS 101
393 #define ATH11K_MAX_5G_CHAN 173
394
395 enum ath11k_state {
396 ATH11K_STATE_OFF,
397 ATH11K_STATE_ON,
398 ATH11K_STATE_RESTARTING,
399 ATH11K_STATE_RESTARTED,
400 ATH11K_STATE_WEDGED,
401 /* Add other states as required */
402 };
403
404 /* Antenna noise floor */
405 #define ATH11K_DEFAULT_NOISE_FLOOR -95
406
407 struct ath11k_fw_stats {
408 struct dentry *debugfs_fwstats;
409 u32 pdev_id;
410 u32 stats_id;
411 struct list_head pdevs;
412 struct list_head vdevs;
413 struct list_head bcn;
414 };
415
416 struct ath11k_dbg_htt_stats {
417 u8 type;
418 u8 reset;
419 struct debug_htt_stats_req *stats_req;
420 /* protects shared stats req buffer */
421 spinlock_t lock;
422 };
423
424 struct ath11k_debug {
425 struct dentry *debugfs_pdev;
426 struct ath11k_dbg_htt_stats htt_stats;
427 u32 extd_tx_stats;
428 struct ath11k_fw_stats fw_stats;
429 struct completion fw_stats_complete;
430 bool fw_stats_done;
431 u32 extd_rx_stats;
432 u32 pktlog_filter;
433 u32 pktlog_mode;
434 u32 pktlog_peer_valid;
435 u8 pktlog_peer_addr[ETH_ALEN];
436 u32 rx_filter;
437 };
438
439 struct ath11k_per_peer_tx_stats {
440 u32 succ_bytes;
441 u32 retry_bytes;
442 u32 failed_bytes;
443 u16 succ_pkts;
444 u16 retry_pkts;
445 u16 failed_pkts;
446 u32 duration;
447 u8 ba_fails;
448 bool is_ampdu;
449 };
450
451 #define ATH11K_FLUSH_TIMEOUT (5 * HZ)
452 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
453
454 struct ath11k {
455 struct ath11k_base *ab;
456 struct ath11k_pdev *pdev;
457 struct ieee80211_hw *hw;
458 struct ieee80211_ops *ops;
459 struct ath11k_pdev_wmi *wmi;
460 struct ath11k_pdev_dp dp;
461 u8 mac_addr[ETH_ALEN];
462 u32 ht_cap_info;
463 u32 vht_cap_info;
464 struct ath11k_he ar_he;
465 enum ath11k_state state;
466 bool supports_6ghz;
467 struct {
468 struct completion started;
469 struct completion completed;
470 struct completion on_channel;
471 struct delayed_work timeout;
472 enum ath11k_scan_state state;
473 bool is_roc;
474 int vdev_id;
475 int roc_freq;
476 bool roc_notify;
477 } scan;
478
479 struct {
480 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
481 struct ieee80211_sband_iftype_data
482 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
483 } mac;
484
485 unsigned long dev_flags;
486 unsigned int filter_flags;
487 unsigned long monitor_flags;
488 u32 min_tx_power;
489 u32 max_tx_power;
490 u32 txpower_limit_2g;
491 u32 txpower_limit_5g;
492 u32 txpower_scale;
493 u32 power_scale;
494 u32 chan_tx_pwr;
495 u32 num_stations;
496 u32 max_num_stations;
497 /* To synchronize concurrent synchronous mac80211 callback operations,
498 * concurrent debugfs configuration and concurrent FW statistics events.
499 */
500 struct mutex conf_mutex;
501 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
502 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,
503 * channel context data, survey info, test mode data.
504 */
505 spinlock_t data_lock;
506
507 struct list_head arvifs;
508 /* should never be NULL; needed for regular htt rx */
509 struct ieee80211_channel *rx_channel;
510
511 /* valid during scan; needed for mgmt rx during scan */
512 struct ieee80211_channel *scan_channel;
513
514 u8 cfg_tx_chainmask;
515 u8 cfg_rx_chainmask;
516 u8 num_rx_chains;
517 u8 num_tx_chains;
518 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
519 u8 pdev_idx;
520 u8 lmac_id;
521
522 struct completion peer_assoc_done;
523 struct completion peer_delete_done;
524
525 int install_key_status;
526 struct completion install_key_done;
527
528 int last_wmi_vdev_start_status;
529 struct completion vdev_setup_done;
530 struct completion vdev_delete_done;
531
532 int num_peers;
533 int max_num_peers;
534 u32 num_started_vdevs;
535 u32 num_created_vdevs;
536 unsigned long long allocated_vdev_map;
537
538 struct idr txmgmt_idr;
539 /* protects txmgmt_idr data */
540 spinlock_t txmgmt_idr_lock;
541 atomic_t num_pending_mgmt_tx;
542
543 /* cycle count is reported twice for each visited channel during scan.
544 * access protected by data_lock
545 */
546 u32 survey_last_rx_clear_count;
547 u32 survey_last_cycle_count;
548
549 /* Channel info events are expected to come in pairs without and with
550 * COMPLETE flag set respectively for each channel visit during scan.
551 *
552 * However there are deviations from this rule. This flag is used to
553 * avoid reporting garbage data.
554 */
555 bool ch_info_can_report_survey;
556 struct survey_info survey[ATH11K_NUM_CHANS];
557 struct completion bss_survey_done;
558
559 struct work_struct regd_update_work;
560
561 struct work_struct wmi_mgmt_tx_work;
562 struct sk_buff_head wmi_mgmt_tx_queue;
563
564 struct ath11k_per_peer_tx_stats peer_tx_stats;
565 struct list_head ppdu_stats_info;
566 u32 ppdu_stat_list_depth;
567
568 struct ath11k_per_peer_tx_stats cached_stats;
569 u32 last_ppdu_id;
570 u32 cached_ppdu_id;
571 int monitor_vdev_id;
572 #ifdef CONFIG_ATH11K_DEBUGFS
573 struct ath11k_debug debug;
574 #endif
575 #ifdef CONFIG_ATH11K_SPECTRAL
576 struct ath11k_spectral spectral;
577 #endif
578 bool dfs_block_radar_events;
579 struct ath11k_thermal thermal;
580 };
581
582 struct ath11k_band_cap {
583 u32 phy_id;
584 u32 max_bw_supported;
585 u32 ht_cap_info;
586 u32 he_cap_info[2];
587 u32 he_mcs;
588 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
589 struct ath11k_ppe_threshold he_ppet;
590 u16 he_6ghz_capa;
591 };
592
593 struct ath11k_pdev_cap {
594 u32 supported_bands;
595 u32 ampdu_density;
596 u32 vht_cap;
597 u32 vht_mcs;
598 u32 he_mcs;
599 u32 tx_chain_mask;
600 u32 rx_chain_mask;
601 u32 tx_chain_mask_shift;
602 u32 rx_chain_mask_shift;
603 struct ath11k_band_cap band[NUM_NL80211_BANDS];
604 bool nss_ratio_enabled;
605 u8 nss_ratio_info;
606 };
607
608 struct ath11k_pdev {
609 struct ath11k *ar;
610 u32 pdev_id;
611 struct ath11k_pdev_cap cap;
612 u8 mac_addr[ETH_ALEN];
613 };
614
615 struct ath11k_board_data {
616 const struct firmware *fw;
617 const void *data;
618 size_t len;
619 };
620
621 struct ath11k_bus_params {
622 bool mhi_support;
623 bool m3_fw_support;
624 bool fixed_bdf_addr;
625 bool fixed_mem_region;
626 bool static_window_map;
627 };
628
629 /* IPQ8074 HW channel counters frequency value in hertz */
630 #define IPQ8074_CC_FREQ_HERTZ 320000
631
632 struct ath11k_bp_stats {
633 /* Head Pointer reported by the last HTT Backpressure event for the ring */
634 u16 hp;
635
636 /* Tail Pointer reported by the last HTT Backpressure event for the ring */
637 u16 tp;
638
639 /* Number of Backpressure events received for the ring */
640 u32 count;
641
642 /* Last recorded event timestamp */
643 unsigned long jiffies;
644 };
645
646 struct ath11k_dp_ring_bp_stats {
647 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX];
648 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS];
649 };
650
651 struct ath11k_soc_dp_tx_err_stats {
652 /* TCL Ring Descriptor unavailable */
653 u32 desc_na[DP_TCL_NUM_RING_MAX];
654 /* Other failures during dp_tx due to mem allocation failure
655 * idr unavailable etc.
656 */
657 atomic_t misc_fail;
658 };
659
660 struct ath11k_soc_dp_stats {
661 u32 err_ring_pkts;
662 u32 invalid_rbm;
663 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
664 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
665 u32 hal_reo_error[DP_REO_DST_RING_MAX];
666 struct ath11k_soc_dp_tx_err_stats tx_err;
667 struct ath11k_dp_ring_bp_stats bp_stats;
668 };
669
670 /* Master structure to hold the hw data which may be used in core module */
671 struct ath11k_base {
672 enum ath11k_hw_rev hw_rev;
673 struct platform_device *pdev;
674 struct device *dev;
675 struct ath11k_qmi qmi;
676 struct ath11k_wmi_base wmi_ab;
677 struct completion fw_ready;
678 int num_radios;
679 /* HW channel counters frequency value in hertz common to all MACs */
680 u32 cc_freq_hz;
681
682 struct ath11k_htc htc;
683
684 struct ath11k_dp dp;
685
686 void __iomem *mem;
687 unsigned long mem_len;
688
689 struct {
690 enum ath11k_bus bus;
691 const struct ath11k_hif_ops *ops;
692 } hif;
693
694 struct {
695 struct completion wakeup_completed;
696 } wow;
697
698 struct ath11k_ce ce;
699 struct timer_list rx_replenish_retry;
700 struct ath11k_hal hal;
701 /* To synchronize core_start/core_stop */
702 struct mutex core_lock;
703 /* Protects data like peers */
704 spinlock_t base_lock;
705 struct ath11k_pdev pdevs[MAX_RADIOS];
706 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS];
707 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS];
708 unsigned long long free_vdev_map;
709 struct list_head peers;
710 wait_queue_head_t peer_mapping_wq;
711 u8 mac_addr[ETH_ALEN];
712 bool wmi_ready;
713 u32 wlan_init_status;
714 int irq_num[ATH11K_IRQ_NUM_MAX];
715 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
716 struct napi_struct *napi;
717 struct ath11k_targ_cap target_caps;
718 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
719 bool pdevs_macaddr_valid;
720 int bd_api;
721
722 struct ath11k_hw_params hw_params;
723 struct ath11k_bus_params bus_params;
724
725 const struct firmware *cal_file;
726
727 /* Below regd's are protected by ab->data_lock */
728 /* This is the regd set for every radio
729 * by the firmware during initializatin
730 */
731 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
732 /* This regd is set during dynamic country setting
733 * This may or may not be used during the runtime
734 */
735 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
736
737 /* Current DFS Regulatory */
738 enum ath11k_dfs_region dfs_region;
739 #ifdef CONFIG_ATH11K_DEBUGFS
740 struct dentry *debugfs_soc;
741 struct dentry *debugfs_ath11k;
742 #endif
743 struct ath11k_soc_dp_stats soc_stats;
744
745 unsigned long dev_flags;
746 struct completion driver_recovery;
747 struct workqueue_struct *workqueue;
748 struct work_struct restart_work;
749 struct {
750 /* protected by data_lock */
751 u32 fw_crash_counter;
752 } stats;
753 u32 pktlog_defs_checksum;
754
755 struct ath11k_dbring_cap *db_caps;
756 u32 num_db_cap;
757
758 struct timer_list mon_reap_timer;
759
760 struct completion htc_suspend;
761
762 /* must be last */
763 u8 drv_priv[0] __aligned(sizeof(void *));
764 };
765
766 struct ath11k_fw_stats_pdev {
767 struct list_head list;
768
769 /* PDEV stats */
770 s32 ch_noise_floor;
771 /* Cycles spent transmitting frames */
772 u32 tx_frame_count;
773 /* Cycles spent receiving frames */
774 u32 rx_frame_count;
775 /* Total channel busy time, evidently */
776 u32 rx_clear_count;
777 /* Total on-channel time */
778 u32 cycle_count;
779 u32 phy_err_count;
780 u32 chan_tx_power;
781 u32 ack_rx_bad;
782 u32 rts_bad;
783 u32 rts_good;
784 u32 fcs_bad;
785 u32 no_beacons;
786 u32 mib_int_count;
787
788 /* PDEV TX stats */
789 /* Num HTT cookies queued to dispatch list */
790 s32 comp_queued;
791 /* Num HTT cookies dispatched */
792 s32 comp_delivered;
793 /* Num MSDU queued to WAL */
794 s32 msdu_enqued;
795 /* Num MPDU queue to WAL */
796 s32 mpdu_enqued;
797 /* Num MSDUs dropped by WMM limit */
798 s32 wmm_drop;
799 /* Num Local frames queued */
800 s32 local_enqued;
801 /* Num Local frames done */
802 s32 local_freed;
803 /* Num queued to HW */
804 s32 hw_queued;
805 /* Num PPDU reaped from HW */
806 s32 hw_reaped;
807 /* Num underruns */
808 s32 underrun;
809 /* Num hw paused */
810 u32 hw_paused;
811 /* Num PPDUs cleaned up in TX abort */
812 s32 tx_abort;
813 /* Num MPDUs requeued by SW */
814 s32 mpdus_requeued;
815 /* excessive retries */
816 u32 tx_ko;
817 u32 tx_xretry;
818 /* data hw rate code */
819 u32 data_rc;
820 /* Scheduler self triggers */
821 u32 self_triggers;
822 /* frames dropped due to excessive sw retries */
823 u32 sw_retry_failure;
824 /* illegal rate phy errors */
825 u32 illgl_rate_phy_err;
826 /* wal pdev continuous xretry */
827 u32 pdev_cont_xretry;
828 /* wal pdev tx timeouts */
829 u32 pdev_tx_timeout;
830 /* wal pdev resets */
831 u32 pdev_resets;
832 /* frames dropped due to non-availability of stateless TIDs */
833 u32 stateless_tid_alloc_failure;
834 /* PhY/BB underrun */
835 u32 phy_underrun;
836 /* MPDU is more than txop limit */
837 u32 txop_ovf;
838 /* Num sequences posted */
839 u32 seq_posted;
840 /* Num sequences failed in queueing */
841 u32 seq_failed_queueing;
842 /* Num sequences completed */
843 u32 seq_completed;
844 /* Num sequences restarted */
845 u32 seq_restarted;
846 /* Num of MU sequences posted */
847 u32 mu_seq_posted;
848 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
849 * (Reset,channel change)
850 */
851 s32 mpdus_sw_flush;
852 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */
853 s32 mpdus_hw_filter;
854 /* Num MPDUs truncated by PDG (TXOP, TBTT,
855 * PPDU_duration based on rate, dyn_bw)
856 */
857 s32 mpdus_truncated;
858 /* Num MPDUs that was tried but didn't receive ACK or BA */
859 s32 mpdus_ack_failed;
860 /* Num MPDUs that was dropped du to expiry. */
861 s32 mpdus_expired;
862
863 /* PDEV RX stats */
864 /* Cnts any change in ring routing mid-ppdu */
865 s32 mid_ppdu_route_change;
866 /* Total number of statuses processed */
867 s32 status_rcvd;
868 /* Extra frags on rings 0-3 */
869 s32 r0_frags;
870 s32 r1_frags;
871 s32 r2_frags;
872 s32 r3_frags;
873 /* MSDUs / MPDUs delivered to HTT */
874 s32 htt_msdus;
875 s32 htt_mpdus;
876 /* MSDUs / MPDUs delivered to local stack */
877 s32 loc_msdus;
878 s32 loc_mpdus;
879 /* AMSDUs that have more MSDUs than the status ring size */
880 s32 oversize_amsdu;
881 /* Number of PHY errors */
882 s32 phy_errs;
883 /* Number of PHY errors drops */
884 s32 phy_err_drop;
885 /* Number of mpdu errors - FCS, MIC, ENC etc. */
886 s32 mpdu_errs;
887 /* Num overflow errors */
888 s32 rx_ovfl_errs;
889 };
890
891 struct ath11k_fw_stats_vdev {
892 struct list_head list;
893
894 u32 vdev_id;
895 u32 beacon_snr;
896 u32 data_snr;
897 u32 num_tx_frames[WLAN_MAX_AC];
898 u32 num_rx_frames;
899 u32 num_tx_frames_retries[WLAN_MAX_AC];
900 u32 num_tx_frames_failures[WLAN_MAX_AC];
901 u32 num_rts_fail;
902 u32 num_rts_success;
903 u32 num_rx_err;
904 u32 num_rx_discard;
905 u32 num_tx_not_acked;
906 u32 tx_rate_history[MAX_TX_RATE_VALUES];
907 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
908 };
909
910 struct ath11k_fw_stats_bcn {
911 struct list_head list;
912
913 u32 vdev_id;
914 u32 tx_bcn_succ_cnt;
915 u32 tx_bcn_outage_cnt;
916 };
917
918 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[];
919 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[];
920 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[];
921
922 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
923 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
924
925 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[];
926 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[];
927 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
928 int ath11k_core_pre_init(struct ath11k_base *ab);
929 int ath11k_core_init(struct ath11k_base *ath11k);
930 void ath11k_core_deinit(struct ath11k_base *ath11k);
931 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
932 enum ath11k_bus bus,
933 const struct ath11k_bus_params *bus_params);
934 void ath11k_core_free(struct ath11k_base *ath11k);
935 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
936 struct ath11k_board_data *bd);
937 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);
938 int ath11k_core_check_dt(struct ath11k_base *ath11k);
939
940 void ath11k_core_halt(struct ath11k *ar);
941 int ath11k_core_resume(struct ath11k_base *ab);
942 int ath11k_core_suspend(struct ath11k_base *ab);
943
944 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
945 const char *filename);
946
ath11k_scan_state_str(enum ath11k_scan_state state)947 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state)
948 {
949 switch (state) {
950 case ATH11K_SCAN_IDLE:
951 return "idle";
952 case ATH11K_SCAN_STARTING:
953 return "starting";
954 case ATH11K_SCAN_RUNNING:
955 return "running";
956 case ATH11K_SCAN_ABORTING:
957 return "aborting";
958 }
959
960 return "unknown";
961 }
962
ATH11K_SKB_CB(struct sk_buff * skb)963 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb)
964 {
965 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) >
966 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
967 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
968 }
969
ATH11K_SKB_RXCB(struct sk_buff * skb)970 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb)
971 {
972 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb));
973 return (struct ath11k_skb_rxcb *)skb->cb;
974 }
975
ath11k_vif_to_arvif(struct ieee80211_vif * vif)976 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif)
977 {
978 return (struct ath11k_vif *)vif->drv_priv;
979 }
980
ath11k_ab_to_ar(struct ath11k_base * ab,int mac_id)981 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab,
982 int mac_id)
983 {
984 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
985 }
986
ath11k_core_create_firmware_path(struct ath11k_base * ab,const char * filename,void * buf,size_t buf_len)987 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,
988 const char *filename,
989 void *buf, size_t buf_len)
990 {
991 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
992 ab->hw_params.fw.dir, filename);
993 }
994
ath11k_bus_str(enum ath11k_bus bus)995 static inline const char *ath11k_bus_str(enum ath11k_bus bus)
996 {
997 switch (bus) {
998 case ATH11K_BUS_PCI:
999 return "pci";
1000 case ATH11K_BUS_AHB:
1001 return "ahb";
1002 }
1003
1004 return "unknown";
1005 }
1006
1007 #endif /* _CORE_H_ */
1008