Home
last modified time | relevance | path

Searched defs:BL1_RW_LIMIT (Results 1 – 14 of 14) sorted by relevance

/trusted-firmware-a/plat/hisilicon/poplar/include/
A Dpoplar_layout.h122 #define BL1_RW_LIMIT (BL1_RW_BASE + BL1_RW_SIZE) macro
/trusted-firmware-a/plat/hisilicon/hikey/include/
A Dhikey_layout.h42 #define BL1_RW_LIMIT (0xF9898000) macro
/trusted-firmware-a/plat/hisilicon/hikey960/include/
A Dplatform_def.h56 #define BL1_RW_LIMIT (0x1B000000) macro
/trusted-firmware-a/include/plat/marvell/armada/a3k/common/
A Dmarvell_def.h151 #define BL1_RW_LIMIT (MARVELL_BL_RAM_BASE + MARVELL_BL_RAM_SIZE) macro
/trusted-firmware-a/include/plat/marvell/armada/a8k/common/
A Dmarvell_def.h182 #define BL1_RW_LIMIT (MARVELL_BL_RAM_BASE + MARVELL_BL_RAM_SIZE) macro
/trusted-firmware-a/plat/brcm/board/stingray/include/
A Dplatform_def.h102 #define BL1_RW_LIMIT (BL1_RW_BASE + 0x12000) macro
/trusted-firmware-a/plat/layerscape/board/ls1043/include/
A Dplatform_def.h129 #define BL1_RW_LIMIT LS_SRAM_LIMIT macro
/trusted-firmware-a/plat/rpi/rpi3/include/
A Dplatform_def.h172 #define BL1_RW_LIMIT (BL_RAM_BASE + BL_RAM_SIZE) macro
/trusted-firmware-a/plat/intel/soc/common/include/
A Dplatform_def.h123 #define BL1_RW_LIMIT (0xffe1ffff) macro
/trusted-firmware-a/plat/arm/board/fvp_ve/include/
A Dplatform_def.h207 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \ macro
/trusted-firmware-a/plat/arm/board/a5ds/include/
A Dplatform_def.h224 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \ macro
/trusted-firmware-a/plat/qemu/qemu/include/
A Dplatform_def.h132 #define BL1_RW_LIMIT (BL_RAM_BASE + BL_RAM_SIZE) macro
/trusted-firmware-a/plat/qemu/qemu_sbsa/include/
A Dplatform_def.h119 #define BL1_RW_LIMIT (BL_RAM_BASE + BL_RAM_SIZE) macro
/trusted-firmware-a/include/plat/arm/common/
A Darm_def.h512 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \ macro

Completed in 15 milliseconds