/tf-a-ffa_el3_spmc/plat/nxp/soc-lx2160a/lx2160aqds/ |
A D | plat_def.h | 52 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE \ macro 55 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
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/tf-a-ffa_el3_spmc/plat/nxp/soc-lx2160a/lx2160ardb/ |
A D | plat_def.h | 52 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE \ macro 55 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
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/tf-a-ffa_el3_spmc/plat/nxp/soc-lx2160a/lx2162aqds/ |
A D | plat_def.h | 52 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE \ macro 55 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
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/tf-a-ffa_el3_spmc/plat/brcm/board/stingray/include/ |
A D | platform_def.h | 113 #define BL2_LIMIT (BL2_BASE + 0x40000) macro 119 #define BL2_LIMIT (BL2_BASE + 0x40000) macro 125 #define BL2_LIMIT (BRCM_BL_RAM_BASE + BRCM_BL_RAM_SIZE) macro
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/tf-a-ffa_el3_spmc/plat/hisilicon/poplar/include/ |
A D | poplar_layout.h | 126 #define BL2_LIMIT (BL2_BASE + BL2_SIZE) macro
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/tf-a-ffa_el3_spmc/plat/renesas/common/include/ |
A D | platform_def.h | 109 #define BL2_LIMIT U(0xE6320000) macro 111 #define BL2_LIMIT U(0xE6360000) macro
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/tf-a-ffa_el3_spmc/plat/socionext/uniphier/include/ |
A D | platform_def.h | 54 #define BL2_LIMIT (BL2_BASE + UNIPHIER_BL2_MAX_SIZE) macro
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/tf-a-ffa_el3_spmc/plat/hisilicon/hikey/include/ |
A D | hikey_layout.h | 64 #define BL2_LIMIT (0xF9830000) /* 0xf983_0000 */ macro
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/tf-a-ffa_el3_spmc/plat/layerscape/board/ls1043/include/ |
A D | platform_def.h | 110 #define BL2_LIMIT (BL2_BASE + PLAT_LS_MAX_BL2_SIZE) macro 117 #define BL2_LIMIT (BL2_BASE + PLAT_LS_MAX_BL2_SIZE) macro
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/tf-a-ffa_el3_spmc/plat/hisilicon/hikey960/include/ |
A D | platform_def.h | 62 #define BL2_LIMIT (BL2_BASE + 0x58000) /* 1AC5_8000 */ macro
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/tf-a-ffa_el3_spmc/include/plat/marvell/armada/a3k/common/ |
A D | marvell_def.h | 161 #define BL2_LIMIT BL31_BASE macro
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/tf-a-ffa_el3_spmc/include/plat/marvell/armada/a8k/common/ |
A D | marvell_def.h | 197 #define BL2_LIMIT BL31_BASE macro
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/tf-a-ffa_el3_spmc/plat/st/stm32mp1/include/ |
A D | platform_def.h | 64 #define BL2_LIMIT (STM32MP_BL2_BASE + \ macro
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/tf-a-ffa_el3_spmc/plat/imx/imx7/picopi/include/ |
A D | platform_def.h | 119 #define BL2_LIMIT (BL2_RAM_BASE + BL2_RAM_SIZE) macro
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/tf-a-ffa_el3_spmc/include/plat/arm/common/ |
A D | arm_def.h | 408 #define BL2_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE) macro 415 #define BL2_LIMIT BL1_RW_BASE macro
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/tf-a-ffa_el3_spmc/plat/imx/imx7/warp7/include/ |
A D | platform_def.h | 122 #define BL2_LIMIT (BL2_RAM_BASE + BL2_RAM_SIZE) macro
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/tf-a-ffa_el3_spmc/plat/rpi/rpi3/include/ |
A D | platform_def.h | 183 #define BL2_LIMIT BL31_BASE macro
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/tf-a-ffa_el3_spmc/plat/arm/board/fvp_ve/include/ |
A D | platform_def.h | 219 #define BL2_LIMIT BL1_RW_BASE macro
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/tf-a-ffa_el3_spmc/plat/imx/imx8m/imx8mm/include/ |
A D | platform_def.h | 41 #define BL2_LIMIT U(0x940000) macro
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/tf-a-ffa_el3_spmc/plat/intel/soc/common/include/ |
A D | platform_def.h | 127 #define BL2_LIMIT (0xffe1b000) macro
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/tf-a-ffa_el3_spmc/plat/arm/board/a5ds/include/ |
A D | platform_def.h | 234 #define BL2_LIMIT BL1_RW_BASE macro
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/tf-a-ffa_el3_spmc/plat/qemu/qemu/include/ |
A D | platform_def.h | 141 #define BL2_LIMIT BL31_BASE macro
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/tf-a-ffa_el3_spmc/plat/arm/board/diphda/common/include/ |
A D | platform_def.h | 169 #define BL2_LIMIT (ARM_BL_RAM_BASE + \ macro
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/tf-a-ffa_el3_spmc/plat/qemu/qemu_sbsa/include/ |
A D | platform_def.h | 129 #define BL2_LIMIT BL31_BASE macro
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