1 /* 2 * Copyright (c) 2017-2021, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef BOOT_API_H 8 #define BOOT_API_H 9 10 #include <stdint.h> 11 #include <stdio.h> 12 13 /* 14 * Possible value of boot context field 'auth_status' 15 */ 16 /* No authentication done */ 17 #define BOOT_API_CTX_AUTH_NO 0x0U 18 /* Authentication done and failed */ 19 #define BOOT_API_CTX_AUTH_FAILED 0x1U 20 /* Authentication done and succeeded */ 21 #define BOOT_API_CTX_AUTH_SUCCESS 0x2U 22 23 /* 24 * Possible value of boot context field 'boot_interface_sel' 25 */ 26 27 /* Value of field 'boot_interface_sel' when no boot occurred */ 28 #define BOOT_API_CTX_BOOT_INTERFACE_SEL_NO 0x0U 29 30 /* Boot occurred on SD */ 31 #define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD 0x1U 32 33 /* Boot occurred on EMMC */ 34 #define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC 0x2U 35 36 /* Boot occurred on FMC */ 37 #define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC 0x3U 38 39 /* Boot occurred on QSPI NOR */ 40 #define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI 0x4U 41 42 /* Boot occurred on USB */ 43 #define BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB 0x6U 44 45 /* Boot occurred on QSPI NAND */ 46 #define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI 0x7U 47 48 /** 49 * @brief Possible value of boot context field 'EmmcXferStatus' 50 */ 51 /* 52 * Possible value of boot context field 'emmc_xfer_status' 53 */ 54 #define BOOT_API_CTX_EMMC_XFER_STATUS_NOT_STARTED 0x0U 55 #define BOOT_API_CTX_EMMC_XFER_STATUS_DATAEND_DETECTED 0x1U 56 #define BOOT_API_CTX_EMMC_XFER_STATUS_XFER_OVERALL_TIMEOUT_DETECTED 0x2U 57 #define BOOT_API_CTX_EMMC_XFER_STATUS_XFER_DATA_TIMEOUT 0x3U 58 59 /* 60 * Possible value of boot context field 'emmc_error_status' 61 */ 62 #define BOOT_API_CTX_EMMC_ERROR_STATUS_NONE 0x0U 63 #define BOOT_API_CTX_EMMC_ERROR_STATUS_CMD_TIMEOUT 0x1U 64 #define BOOT_API_CTX_EMMC_ERROR_STATUS_ACK_TIMEOUT 0x2U 65 #define BOOT_API_CTX_EMMC_ERROR_STATUS_DATA_CRC_FAIL 0x3U 66 #define BOOT_API_CTX_EMMC_ERROR_STATUS_NOT_ENOUGH_BOOT_DATA_RX 0x4U 67 #define BOOT_API_CTX_EMMC_ERROR_STATUS_HEADER_NOT_FOUND 0x5U 68 #define BOOT_API_CTX_EMMC_ERROR_STATUS_HEADER_SIZE_ZERO 0x6U 69 #define BOOT_API_CTX_EMMC_ERROR_STATUS_IMAGE_NOT_COMPLETE 0x7U 70 71 /* Image Header related definitions */ 72 73 /* Definition of header version */ 74 #define BOOT_API_HEADER_VERSION 0x00010000U 75 76 /* 77 * Magic number used to detect header in memory 78 * Its value must be 'S' 'T' 'M' 0x32, i.e 0x324D5453 as field 79 * 'bootapi_image_header_t.magic' 80 * This identifies the start of a boot image. 81 */ 82 #define BOOT_API_IMAGE_HEADER_MAGIC_NB 0x324D5453U 83 84 /* Definitions related to Authentication used in image header structure */ 85 #define BOOT_API_ECDSA_PUB_KEY_LEN_IN_BYTES 64 86 #define BOOT_API_ECDSA_SIGNATURE_LEN_IN_BYTES 64 87 #define BOOT_API_SHA256_DIGEST_SIZE_IN_BYTES 32 88 89 /* Possible values of the field 'boot_api_image_header_t.ecc_algo_type' */ 90 #define BOOT_API_ECDSA_ALGO_TYPE_P256NIST 1 91 #define BOOT_API_ECDSA_ALGO_TYPE_BRAINPOOL256 2 92 93 /* 94 * Cores secure magic numbers 95 * Constant to be stored in bakcup register 96 * BOOT_API_MAGIC_NUMBER_TAMP_BCK_REG_IDX 97 */ 98 #define BOOT_API_A7_CORE0_MAGIC_NUMBER 0xCA7FACE0U 99 #define BOOT_API_A7_CORE1_MAGIC_NUMBER 0xCA7FACE1U 100 101 /* 102 * TAMP_BCK4R register index 103 * This register is used to write a Magic Number in order to restart 104 * Cortex A7 Core 1 and make it execute @ branch address from TAMP_BCK5R 105 */ 106 #define BOOT_API_CORE1_MAGIC_NUMBER_TAMP_BCK_REG_IDX 4U 107 108 /* 109 * TAMP_BCK5R register index 110 * This register is used to contain the branch address of 111 * Cortex A7 Core 1 when restarted by a TAMP_BCK4R magic number writing 112 */ 113 #define BOOT_API_CORE1_BRANCH_ADDRESS_TAMP_BCK_REG_IDX 5U 114 115 /* 116 * Possible value of boot context field 'hse_clock_value_in_hz' 117 */ 118 #define BOOT_API_CTX_HSE_CLOCK_VALUE_UNDEFINED 0U 119 #define BOOT_API_CTX_HSE_CLOCK_VALUE_24_MHZ 24000000U 120 #define BOOT_API_CTX_HSE_CLOCK_VALUE_25_MHZ 25000000U 121 #define BOOT_API_CTX_HSE_CLOCK_VALUE_26_MHZ 26000000U 122 123 /* 124 * Possible value of boot context field 'boot_partition_used_toboot' 125 */ 126 #define BOOT_API_CTX_BOOT_PARTITION_UNDEFINED 0U 127 128 /* Used FSBL1 to boot */ 129 #define BOOT_API_CTX_BOOT_PARTITION_FSBL1 1U 130 131 /* Used FSBL2 to boot */ 132 #define BOOT_API_CTX_BOOT_PARTITION_FSBL2 2U 133 134 /* OTP_CFG0 */ 135 #define BOOT_API_OTP_MODE_WORD_NB 0 136 /* Closed = OTP_CFG0[6] */ 137 #define BOOT_API_OTP_MODE_CLOSED_BIT_POS 6 138 139 #define BOOT_API_RETURN_OK 0x77U 140 141 /* 142 * Boot Context related definitions 143 */ 144 145 /* 146 * Boot core boot configuration structure 147 * Specifies all items of the cold boot configuration 148 * Memory and peripheral part. 149 */ 150 typedef struct { 151 /* 152 * Boot interface used to boot : take values from defines 153 * BOOT_API_CTX_BOOT_INTERFACE_SEL_XXX above 154 */ 155 uint16_t boot_interface_selected; 156 uint16_t boot_interface_instance; 157 uint32_t reserved1[13]; 158 uint32_t otp_afmux_values[3]; 159 uint32_t reserved[5]; 160 uint32_t auth_status; 161 162 /* 163 * Pointers to bootROM External Secure Services 164 * - ECDSA check key 165 * - ECDSA verify signature 166 * - ECDSA verify signature and go 167 */ 168 uint32_t (*bootrom_ecdsa_check_key)(uint8_t *pubkey_in, 169 uint8_t *pubkey_out); 170 uint32_t (*bootrom_ecdsa_verify_signature)(uint8_t *hash_in, 171 uint8_t *pubkey_in, 172 uint8_t *signature, 173 uint32_t ecc_algo); 174 uint32_t (*bootrom_ecdsa_verify_and_go)(uint8_t *hash_in, 175 uint8_t *pub_key_in, 176 uint8_t *signature, 177 uint32_t ecc_algo, 178 uint32_t *entry_in); 179 180 /* 181 * Information specific to an SD boot 182 * Updated each time an SD boot is at least attempted, 183 * even if not successful 184 * Note : This is useful to understand why an SD boot failed 185 * in particular 186 */ 187 uint32_t sd_err_internal_timeout_cnt; 188 uint32_t sd_err_dcrc_fail_cnt; 189 uint32_t sd_err_dtimeout_cnt; 190 uint32_t sd_err_ctimeout_cnt; 191 uint32_t sd_err_ccrc_fail_cnt; 192 uint32_t sd_overall_retry_cnt; 193 /* 194 * Information specific to an eMMC boot 195 * Updated each time an eMMC boot is at least attempted, 196 * even if not successful 197 * Note : This is useful to understand why an eMMC boot failed 198 * in particular 199 */ 200 uint32_t emmc_xfer_status; 201 uint32_t emmc_error_status; 202 uint32_t emmc_nbbytes_rxcopied_tosysram_download_area; 203 uint32_t hse_clock_value_in_hz; 204 /* 205 * Boot partition : 206 * ie FSBL partition on which the boot was successful 207 */ 208 uint32_t boot_partition_used_toboot; 209 210 } __packed boot_api_context_t; 211 212 /* 213 * Image Header related definitions 214 */ 215 216 /* 217 * Structure used to define the common Header format used for FSBL, xloader, 218 * ... and in particular used by bootROM for FSBL header readout. 219 * FSBL header size is 256 Bytes = 0x100 220 */ 221 typedef struct { 222 /* BOOT_API_IMAGE_HEADER_MAGIC_NB */ 223 uint32_t magic; 224 uint8_t image_signature[BOOT_API_ECDSA_SIGNATURE_LEN_IN_BYTES]; 225 /* 226 * Checksum of payload 227 * 32-bit sum all all payload bytes considered as 8 bit unigned numbers, 228 * discarding any overflow bits. 229 * Use to check UART/USB downloaded image integrity when signature 230 * is not used (i.e bit 0 : 'No_sig_check' = 1 in option flags) 231 */ 232 uint32_t payload_checksum; 233 /* Image header version : should have value BOOT_API_HEADER_VERSION */ 234 uint32_t header_version; 235 /* Image length in bytes */ 236 uint32_t image_length; 237 /* 238 * Image Entry point address : should be in the SYSRAM area 239 * and at least within the download area range 240 */ 241 uint32_t image_entry_point; 242 /* Reserved */ 243 uint32_t reserved1; 244 /* 245 * Image load address : not used by bootROM but to be consistent 246 * with header format for other packages (xloader, ...) 247 */ 248 uint32_t load_address; 249 /* Reserved */ 250 uint32_t reserved2; 251 /* Image version to be compared by bootROM with monotonic 252 * counter value in OTP_CFG4 prior executing the downloaded image 253 */ 254 uint32_t image_version; 255 /* 256 * Option flags: 257 * Bit 0 : No signature check request : 'No_sig_check' 258 * value 1 : for No signature check request 259 * value 0 : No request to bypass the signature check 260 * Note : No signature check is never allowed on a Secured chip 261 */ 262 uint32_t option_flags; 263 /* 264 * Type of ECC algorithm to use : 265 * value 1 : for P-256 NIST algorithm 266 * value 2 : for Brainpool 256 algorithm 267 * See definitions 'BOOT_API_ECDSA_ALGO_TYPE_XXX' above. 268 */ 269 uint32_t ecc_algo_type; 270 /* 271 * OEM ECC Public Key (aka Root pubk) provided in header on 512 bits. 272 * The SHA-256 hash of the OEM ECC pubk must match the one stored 273 * in OTP cells. 274 */ 275 uint8_t ecc_pubk[BOOT_API_ECDSA_PUB_KEY_LEN_IN_BYTES]; 276 /* Pad up to 256 byte total size */ 277 uint8_t pad[83]; 278 /* Add binary type information */ 279 uint8_t binary_type; 280 } __packed boot_api_image_header_t; 281 282 #endif /* BOOT_API_H */ 283