1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * K2G: Pinmux configuration
4  *
5  * (C) Copyright 2015
6  *     Texas Instruments Incorporated, <www.ti.com>
7  */
8 
9 #ifndef __ASM_ARCH_MUX_K2G_H
10 #define __ASM_ARCH_MUX_K2G_H
11 
12 #include <common.h>
13 #include <asm/io.h>
14 
15 #define K2G_PADCFG_REG	(KS2_DEVICE_STATE_CTRL_BASE + 0x1000)
16 
17 /*
18  * 20:19 - buffer class RW fixed
19  * 18    - rxactive (Input enabled for the pad ) 0 - Di; 1 - En;
20  * 17    - pulltypesel (0 - PULLDOWN; 1 - PULLUP);
21  * 16    - pulluden (0 - PULLUP/DOWN EN; 1 - DI);
22  * 3:0   - muxmode (available modes 0:5)
23  */
24 
25 #define PIN_IEN	(1 << 18) /* pin input enabled */
26 #define PIN_PDIS	(1 << 16) /* pull up/down disabled */
27 #define PIN_PTU	(1 << 17) /* pull up */
28 #define PIN_PTD	(0 << 17) /* pull down */
29 
30 #define BUFFER_CLASS_B	(0 << 19)
31 #define BUFFER_CLASS_C	(1 << 19)
32 #define BUFFER_CLASS_D	(2 << 19)
33 #define BUFFER_CLASS_E	(3 << 19)
34 
35 #define MODE(m)	((m) & 0x7)
36 #define MAX_PIN_N	260
37 
38 #define MUX_CFG(value, index)  \
39 	__raw_writel(\
40 		     (value) | \
41 		     (__raw_readl(K2G_PADCFG_REG + (index << 2)) & \
42 		      (0x3 << 19)),\
43 		     (K2G_PADCFG_REG + (index << 2))\
44 		    );
45 
46 struct pin_cfg {
47 	int	reg_inx;
48 	u32	val;
49 };
50 
configure_pin_mux(struct pin_cfg * pin_mux)51 static inline void configure_pin_mux(struct pin_cfg *pin_mux)
52 {
53 	if (!pin_mux)
54 		return;
55 
56 	while ((pin_mux->reg_inx >= 0) && (pin_mux->reg_inx < MAX_PIN_N)) {
57 		MUX_CFG(pin_mux->val, pin_mux->reg_inx);
58 		pin_mux++;
59 	}
60 }
61 
62 #endif /* __ASM_ARCH_MUX_K2G_H */
63