1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* 3 * This file is part of the libpayload project. 4 * 5 * Copyright (C) 2008 Advanced Micro Devices, Inc. 6 */ 7 8 #ifndef _COREBOOT_TABLES_H 9 #define _COREBOOT_TABLES_H 10 11 struct memory_area; 12 13 struct cbuint64 { 14 u32 lo; 15 u32 hi; 16 }; 17 18 struct cb_header { 19 u8 signature[4]; 20 u32 header_bytes; 21 u32 header_checksum; 22 u32 table_bytes; 23 u32 table_checksum; 24 u32 table_entries; 25 }; 26 27 struct cb_record { 28 u32 tag; 29 u32 size; 30 }; 31 32 #define CB_TAG_UNUSED 0x0000 33 #define CB_TAG_MEMORY 0x0001 34 35 struct cb_memory_range { 36 struct cbuint64 start; 37 struct cbuint64 size; 38 u32 type; 39 }; 40 41 #define CB_MEM_RAM 1 42 #define CB_MEM_RESERVED 2 43 #define CB_MEM_ACPI 3 44 #define CB_MEM_NVS 4 45 #define CB_MEM_UNUSABLE 5 46 #define CB_MEM_VENDOR_RSVD 6 47 #define CB_MEM_TABLE 16 48 49 struct cb_memory { 50 u32 tag; 51 u32 size; 52 struct cb_memory_range map[0]; 53 }; 54 55 #define CB_TAG_HWRPB 0x0002 56 57 struct cb_hwrpb { 58 u32 tag; 59 u32 size; 60 u64 hwrpb; 61 }; 62 63 #define CB_TAG_MAINBOARD 0x0003 64 65 struct cb_mainboard { 66 u32 tag; 67 u32 size; 68 u8 vendor_idx; 69 u8 part_number_idx; 70 u8 strings[0]; 71 }; 72 73 #define CB_TAG_VERSION 0x0004 74 #define CB_TAG_EXTRA_VERSION 0x0005 75 #define CB_TAG_BUILD 0x0006 76 #define CB_TAG_COMPILE_TIME 0x0007 77 #define CB_TAG_COMPILE_BY 0x0008 78 #define CB_TAG_COMPILE_HOST 0x0009 79 #define CB_TAG_COMPILE_DOMAIN 0x000a 80 #define CB_TAG_COMPILER 0x000b 81 #define CB_TAG_LINKER 0x000c 82 #define CB_TAG_ASSEMBLER 0x000d 83 84 struct cb_string { 85 u32 tag; 86 u32 size; 87 u8 string[0]; 88 }; 89 90 #define CB_TAG_SERIAL 0x000f 91 92 struct cb_serial { 93 u32 tag; 94 u32 size; 95 #define CB_SERIAL_TYPE_IO_MAPPED 1 96 #define CB_SERIAL_TYPE_MEMORY_MAPPED 2 97 u32 type; 98 u32 baseaddr; 99 u32 baud; 100 u32 regwidth; 101 102 /* 103 * Crystal or input frequency to the chip containing the UART. 104 * Provide the board specific details to allow the payload to 105 * initialize the chip containing the UART and make independent 106 * decisions as to which dividers to select and their values 107 * to eventually arrive at the desired console baud-rate. 108 */ 109 u32 input_hertz; 110 111 /* 112 * UART PCI address: bus, device, function 113 * 1 << 31 - Valid bit, PCI UART in use 114 * Bus << 20 115 * Device << 15 116 * Function << 12 117 */ 118 u32 uart_pci_addr; 119 }; 120 121 #define CB_TAG_CONSOLE 0x0010 122 123 struct cb_console { 124 u32 tag; 125 u32 size; 126 u16 type; 127 }; 128 129 #define CB_TAG_CONSOLE_SERIAL8250 0 130 #define CB_TAG_CONSOLE_VGA 1 /* OBSOLETE */ 131 #define CB_TAG_CONSOLE_BTEXT 2 /* OBSOLETE */ 132 #define CB_TAG_CONSOLE_LOGBUF 3 133 #define CB_TAG_CONSOLE_SROM 4 /* OBSOLETE */ 134 #define CB_TAG_CONSOLE_EHCI 5 135 136 #define CB_TAG_FORWARD 0x0011 137 138 struct cb_forward { 139 u32 tag; 140 u32 size; 141 u64 forward; 142 }; 143 144 #define CB_TAG_FRAMEBUFFER 0x0012 145 146 struct cb_framebuffer { 147 u32 tag; 148 u32 size; 149 u64 physical_address; 150 u32 x_resolution; 151 u32 y_resolution; 152 u32 bytes_per_line; 153 u8 bits_per_pixel; 154 u8 red_mask_pos; 155 u8 red_mask_size; 156 u8 green_mask_pos; 157 u8 green_mask_size; 158 u8 blue_mask_pos; 159 u8 blue_mask_size; 160 u8 reserved_mask_pos; 161 u8 reserved_mask_size; 162 }; 163 164 #define CB_TAG_GPIO 0x0013 165 #define GPIO_MAX_NAME_LENGTH 16 166 167 struct cb_gpio { 168 u32 port; 169 u32 polarity; 170 u32 value; 171 u8 name[GPIO_MAX_NAME_LENGTH]; 172 }; 173 174 struct cb_gpios { 175 u32 tag; 176 u32 size; 177 u32 count; 178 struct cb_gpio gpios[0]; 179 }; 180 181 #define CB_TAG_FDT 0x0014 182 183 struct cb_fdt { 184 uint32_t tag; 185 uint32_t size; /* size of the entire entry */ 186 /* the actual FDT gets placed here */ 187 }; 188 189 #define CB_TAG_VDAT 0x0015 190 191 struct cb_vdat { 192 uint32_t tag; 193 uint32_t size; /* size of the entire entry */ 194 void *vdat_addr; 195 uint32_t vdat_size; 196 }; 197 198 #define CB_TAG_TIMESTAMPS 0x0016 199 #define CB_TAG_CBMEM_CONSOLE 0x0017 200 #define CB_TAG_MRC_CACHE 0x0018 201 202 struct cb_cbmem_tab { 203 uint32_t tag; 204 uint32_t size; 205 void *cbmem_tab; 206 }; 207 208 #define CB_TAG_VBNV 0x0019 209 210 struct cb_vbnv { 211 uint32_t tag; 212 uint32_t size; 213 uint32_t vbnv_start; 214 uint32_t vbnv_size; 215 }; 216 217 #define CB_TAG_CBMEM_ENTRY 0x0031 218 #define CBMEM_ID_SMBIOS 0x534d4254 219 220 struct cb_cbmem_entry { 221 uint32_t tag; 222 uint32_t size; 223 uint64_t address; 224 uint32_t entry_size; 225 uint32_t id; 226 }; 227 228 #define CB_TAG_CMOS_OPTION_TABLE 0x00c8 229 230 struct cb_cmos_option_table { 231 u32 tag; 232 u32 size; 233 u32 header_length; 234 }; 235 236 #define CB_TAG_OPTION 0x00c9 237 238 #define CMOS_MAX_NAME_LENGTH 32 239 240 struct cb_cmos_entries { 241 u32 tag; 242 u32 size; 243 u32 bit; 244 u32 length; 245 u32 config; 246 u32 config_id; 247 u8 name[CMOS_MAX_NAME_LENGTH]; 248 }; 249 250 #define CB_TAG_OPTION_ENUM 0x00ca 251 #define CMOS_MAX_TEXT_LENGTH 32 252 253 struct cb_cmos_enums { 254 u32 tag; 255 u32 size; 256 u32 config_id; 257 u32 value; 258 u8 text[CMOS_MAX_TEXT_LENGTH]; 259 }; 260 261 #define CB_TAG_OPTION_DEFAULTS 0x00cb 262 #define CMOS_IMAGE_BUFFER_SIZE 128 263 264 struct cb_cmos_defaults { 265 u32 tag; 266 u32 size; 267 u32 name_length; 268 u8 name[CMOS_MAX_NAME_LENGTH]; 269 u8 default_set[CMOS_IMAGE_BUFFER_SIZE]; 270 }; 271 272 #define CB_TAG_OPTION_CHECKSUM 0x00cc 273 #define CHECKSUM_NONE 0 274 #define CHECKSUM_PCBIOS 1 275 276 struct cb_cmos_checksum { 277 u32 tag; 278 u32 size; 279 u32 range_start; 280 u32 range_end; 281 u32 location; 282 u32 type; 283 }; 284 285 /* Helpful macros */ 286 287 #define MEM_RANGE_COUNT(_rec) \ 288 (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0])) 289 290 #define MEM_RANGE_PTR(_rec, _idx) \ 291 (((u8 *) (_rec)) + sizeof(*(_rec)) \ 292 + (sizeof((_rec)->map[0]) * (_idx))) 293 294 #define MB_VENDOR_STRING(_mb) \ 295 (((unsigned char *) ((_mb)->strings)) + (_mb)->vendor_idx) 296 297 #define MB_PART_STRING(_mb) \ 298 (((unsigned char *) ((_mb)->strings)) + (_mb)->part_number_idx) 299 300 #define UNPACK_CB64(_in) \ 301 ((((u64) _in.hi) << 32) | _in.lo) 302 303 #define CBMEM_TOC_RESERVED 512 304 #define MAX_CBMEM_ENTRIES 16 305 #define CBMEM_MAGIC 0x434f5245 306 307 struct cbmem_entry { 308 u32 magic; 309 u32 id; 310 u64 base; 311 u64 size; 312 } __packed; 313 314 #define CBMEM_ID_FREESPACE 0x46524545 315 #define CBMEM_ID_GDT 0x4c474454 316 #define CBMEM_ID_ACPI 0x41435049 317 #define CBMEM_ID_CBTABLE 0x43425442 318 #define CBMEM_ID_PIRQ 0x49525154 319 #define CBMEM_ID_MPTABLE 0x534d5054 320 #define CBMEM_ID_RESUME 0x5245534d 321 #define CBMEM_ID_RESUME_SCRATCH 0x52455343 322 #define CBMEM_ID_SMBIOS 0x534d4254 323 #define CBMEM_ID_TIMESTAMP 0x54494d45 324 #define CBMEM_ID_MRCDATA 0x4d524344 325 #define CBMEM_ID_CONSOLE 0x434f4e53 326 #define CBMEM_ID_NONE 0x00000000 327 328 /** 329 * high_table_reserve() - reserve configuration table in high memory 330 * 331 * This reserves configuration table in high memory. 332 * 333 * @return: always 0 334 */ 335 int high_table_reserve(void); 336 337 /** 338 * high_table_malloc() - allocate configuration table in high memory 339 * 340 * This allocates configuration table in high memory. 341 * 342 * @bytes: size of configuration table to be allocated 343 * @return: pointer to configuration table in high memory 344 */ 345 void *high_table_malloc(size_t bytes); 346 347 /** 348 * write_coreboot_table() - write coreboot table 349 * 350 * This writes coreboot table at a given address. 351 * 352 * @addr: start address to write coreboot table 353 * @cfg_tables: pointer to configuration table memory area 354 */ 355 void write_coreboot_table(u32 addr, struct memory_area *cfg_tables); 356 357 /** 358 * locate_coreboot_table() - Try to find coreboot tables at standard locations 359 * 360 * @return address of table that was found, or -ve error number 361 */ 362 long locate_coreboot_table(void); 363 364 #endif 365