1 /* 2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef BPMP_H 8 #define BPMP_H 9 10 #include <stdint.h> 11 12 /* macro to enable clock to the Atomics block */ 13 #define CAR_ENABLE_ATOMICS (1U << 16) 14 15 /* command to get the channel base addresses from bpmp */ 16 #define ATOMIC_CMD_GET 4U 17 18 /* Hardware IRQ # used to signal bpmp of an incoming command */ 19 #define INT_SHR_SEM_OUTBOX_FULL 6U 20 21 /* macros to decode the bpmp's state */ 22 #define CH_MASK(ch) ((uint32_t)0x3 << ((ch) * 2U)) 23 #define MA_FREE(ch) ((uint32_t)0x2 << ((ch) * 2U)) 24 #define MA_ACKD(ch) ((uint32_t)0x3 << ((ch) * 2U)) 25 26 /* response from bpmp to indicate it has powered up */ 27 #define SIGN_OF_LIFE 0xAAAAAAAAU 28 29 /* flags to indicate bpmp driver's state */ 30 #define BPMP_NOT_PRESENT 0xF00DBEEFU 31 #define BPMP_INIT_COMPLETE 0xBEEFF00DU 32 #define BPMP_INIT_PENDING 0xDEADBEEFU 33 #define BPMP_SUSPEND_ENTRY 0xF00DCAFEU 34 35 /* requests serviced by the bpmp */ 36 #define MRQ_PING 0 37 #define MRQ_QUERY_TAG 1 38 #define MRQ_DO_IDLE 2 39 #define MRQ_TOLERATE_IDLE 3 40 #define MRQ_MODULE_LOAD 4 41 #define MRQ_MODULE_UNLOAD 5 42 #define MRQ_SWITCH_CLUSTER 6 43 #define MRQ_TRACE_MODIFY 7 44 #define MRQ_WRITE_TRACE 8 45 #define MRQ_THREADED_PING 9 46 #define MRQ_CPUIDLE_USAGE 10 47 #define MRQ_MODULE_MAIL 11 48 #define MRQ_SCX_ENABLE 12 49 #define MRQ_BPMPIDLE_USAGE 14 50 #define MRQ_HEAP_USAGE 15 51 #define MRQ_SCLK_SKIP_SET_RATE 16 52 #define MRQ_ENABLE_SUSPEND 17 53 #define MRQ_PASR_MASK 18 54 #define MRQ_DEBUGFS 19 55 #define MRQ_THERMAL 27 56 57 /* Tegra PM states as known to BPMP */ 58 #define TEGRA_PM_CC1 9 59 #define TEGRA_PM_CC4 12 60 #define TEGRA_PM_CC6 14 61 #define TEGRA_PM_CC7 15 62 #define TEGRA_PM_SC1 17 63 #define TEGRA_PM_SC2 18 64 #define TEGRA_PM_SC3 19 65 #define TEGRA_PM_SC4 20 66 #define TEGRA_PM_SC7 23 67 68 /* flag to indicate if entry into a CCx power state is allowed */ 69 #define BPMP_CCx_ALLOWED 0U 70 71 /* number of communication channels to interact with the bpmp */ 72 #define NR_CHANNELS 4U 73 74 /* flag to ask bpmp to acknowledge command packet */ 75 #define NO_ACK (0U << 0U) 76 #define DO_ACK (1U << 0U) 77 78 /* size of the command/response data */ 79 #define MSG_DATA_MAX_SZ 120U 80 81 /** 82 * command/response packet to/from the bpmp 83 * 84 * command 85 * ------- 86 * code: MRQ_* command 87 * flags: DO_ACK or NO_ACK 88 * data: 89 * [0] = cpu # 90 * [1] = cluster power state (TEGRA_PM_CCx) 91 * [2] = system power state (TEGRA_PM_SCx) 92 * 93 * response 94 * --------- 95 * code: error code 96 * flags: not used 97 * data: 98 * [0-3] = response value 99 */ 100 typedef struct mb_data { 101 int32_t code; 102 uint32_t flags; 103 uint8_t data[MSG_DATA_MAX_SZ]; 104 } mb_data_t; 105 106 /** 107 * Function to initialise the interface with the bpmp 108 */ 109 int tegra_bpmp_init(void); 110 111 /** 112 * Function to suspend the interface with the bpmp 113 */ 114 void tegra_bpmp_suspend(void); 115 116 /** 117 * Function to resume the interface with the bpmp 118 */ 119 void tegra_bpmp_resume(void); 120 121 /** 122 * Handler to send a MRQ_* command to the bpmp 123 */ 124 int32_t tegra_bpmp_send_receive_atomic(int mrq, const void *ob_data, int ob_sz, 125 void *ib_data, int ib_sz); 126 127 #endif /* BPMP_H */ 128