1menu "ARM architecture" 2 depends on ARM 3 4config SYS_ARCH 5 default "arm" 6 7config ARM64 8 bool 9 select PHYS_64BIT 10 select SYS_CACHE_SHIFT_6 11 12if ARM64 13config POSITION_INDEPENDENT 14 bool "Generate position-independent pre-relocation code" 15 help 16 U-Boot expects to be linked to a specific hard-coded address, and to 17 be loaded to and run from that address. This option lifts that 18 restriction, thus allowing the code to be loaded to and executed from 19 almost any 4K aligned address. This logic relies on the relocation 20 information that is embedded in the binary to support U-Boot 21 relocating itself to the top-of-RAM later during execution. 22 23config INIT_SP_RELATIVE 24 bool "Specify the early stack pointer relative to the .bss section" 25 default n if ARCH_QEMU 26 default y if POSITION_INDEPENDENT 27 help 28 U-Boot typically uses a hard-coded value for the stack pointer 29 before relocation. Enable this option to instead calculate the 30 initial SP at run-time. This is useful to avoid hard-coding addresses 31 into U-Boot, so that it can be loaded and executed at arbitrary 32 addresses and thus avoid using arbitrary addresses at runtime. 33 34 If this option is enabled, the early stack pointer is set to 35 &_bss_start with a offset value added. The offset is specified by 36 SYS_INIT_SP_BSS_OFFSET. 37 38config SYS_INIT_SP_BSS_OFFSET 39 int "Early stack offset from the .bss base address" 40 depends on INIT_SP_RELATIVE 41 default 524288 42 help 43 This option's value is the offset added to &_bss_start in order to 44 calculate the stack pointer. This offset should be large enough so 45 that the early malloc region, global data (gd), and early stack usage 46 do not overlap any appended DTB. 47 48config LINUX_KERNEL_IMAGE_HEADER 49 bool 50 help 51 Place a Linux kernel image header at the start of the U-Boot binary. 52 The format of the header is described in the Linux kernel source at 53 Documentation/arm64/booting.txt. This feature is useful since the 54 image header reports the amount of memory (BSS and similar) that 55 U-Boot needs to use, but which isn't part of the binary. 56 57if LINUX_KERNEL_IMAGE_HEADER 58config LNX_KRNL_IMG_TEXT_OFFSET_BASE 59 hex 60 help 61 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the 62 TEXT_OFFSET value written to the Linux kernel image header. 63endif 64endif 65 66config GIC_V3_ITS 67 bool "ARM GICV3 ITS" 68 select REGMAP 69 select SYSCON 70 help 71 ARM GICV3 Interrupt translation service (ITS). 72 Basic support for programming locality specific peripheral 73 interrupts (LPI) configuration tables and enable LPI tables. 74 LPI configuration table can be used by u-boot or Linux. 75 ARM GICV3 has limitation, once the LPI table is enabled, LPI 76 configuration table can not be re-programmed, unless GICV3 reset. 77 78config STATIC_RELA 79 bool 80 default y if ARM64 81 82config DMA_ADDR_T_64BIT 83 bool 84 default y if ARM64 85 86config HAS_VBAR 87 bool 88 89config HAS_THUMB2 90 bool 91 92# Used for compatibility with asm files copied from the kernel 93config ARM_ASM_UNIFIED 94 bool 95 default y 96 97# Used for compatibility with asm files copied from the kernel 98config THUMB2_KERNEL 99 bool 100 101config SYS_ICACHE_OFF 102 bool "Do not enable icache" 103 default n 104 help 105 Do not enable instruction cache in U-Boot. 106 107config SPL_SYS_ICACHE_OFF 108 bool "Do not enable icache in SPL" 109 depends on SPL 110 default SYS_ICACHE_OFF 111 help 112 Do not enable instruction cache in SPL. 113 114config SYS_DCACHE_OFF 115 bool "Do not enable dcache" 116 default n 117 help 118 Do not enable data cache in U-Boot. 119 120config SPL_SYS_DCACHE_OFF 121 bool "Do not enable dcache in SPL" 122 depends on SPL 123 default SYS_DCACHE_OFF 124 help 125 Do not enable data cache in SPL. 126 127config SYS_ARM_CACHE_CP15 128 bool "CP15 based cache enabling support" 129 help 130 Select this if your processor suports enabling caches by using 131 CP15 registers. 132 133config SYS_ARM_MMU 134 bool "MMU-based Paged Memory Management Support" 135 select SYS_ARM_CACHE_CP15 136 help 137 Select if you want MMU-based virtualised addressing space 138 support via paged memory management. 139 140config SYS_ARM_MPU 141 bool 'Use the ARM v7 PMSA Compliant MPU' 142 help 143 Some ARM systems without an MMU have instead a Memory Protection 144 Unit (MPU) that defines the type and permissions for regions of 145 memory. 146 If your CPU has an MPU then you should choose 'y' here unless you 147 know that you do not want to use the MPU. 148 149# If set, the workarounds for these ARM errata are applied early during U-Boot 150# startup. Note that in general these options force the workarounds to be 151# applied; no CPU-type/version detection exists, unlike the similar options in 152# the Linux kernel. Do not set these options unless they apply! Also note that 153# the following can be machine-specific errata. These do have ability to 154# provide rudimentary version and machine-specific checks, but expect no 155# product checks: 156# CONFIG_ARM_ERRATA_430973 157# CONFIG_ARM_ERRATA_454179 158# CONFIG_ARM_ERRATA_621766 159# CONFIG_ARM_ERRATA_798870 160# CONFIG_ARM_ERRATA_801819 161# CONFIG_ARM_CORTEX_A8_CVE_2017_5715 162# CONFIG_ARM_CORTEX_A15_CVE_2017_5715 163 164config ARM_ERRATA_430973 165 bool 166 167config ARM_ERRATA_454179 168 bool 169 170config ARM_ERRATA_621766 171 bool 172 173config ARM_ERRATA_716044 174 bool 175 176config ARM_ERRATA_725233 177 bool 178 179config ARM_ERRATA_742230 180 bool 181 182config ARM_ERRATA_743622 183 bool 184 185config ARM_ERRATA_751472 186 bool 187 188config ARM_ERRATA_761320 189 bool 190 191config ARM_ERRATA_773022 192 bool 193 194config ARM_ERRATA_774769 195 bool 196 197config ARM_ERRATA_794072 198 bool 199 200config ARM_ERRATA_798870 201 bool 202 203config ARM_ERRATA_801819 204 bool 205 206config ARM_ERRATA_826974 207 bool 208 209config ARM_ERRATA_828024 210 bool 211 212config ARM_ERRATA_829520 213 bool 214 215config ARM_ERRATA_833069 216 bool 217 218config ARM_ERRATA_833471 219 bool 220 221config ARM_ERRATA_845369 222 bool 223 224config ARM_ERRATA_852421 225 bool 226 227config ARM_ERRATA_852423 228 bool 229 230config ARM_ERRATA_855873 231 bool 232 233config ARM_CORTEX_A8_CVE_2017_5715 234 bool 235 236config ARM_CORTEX_A15_CVE_2017_5715 237 bool 238 239config CPU_ARM720T 240 bool 241 select SYS_CACHE_SHIFT_5 242 imply SYS_ARM_MMU 243 244config CPU_ARM920T 245 bool 246 select SYS_CACHE_SHIFT_5 247 imply SYS_ARM_MMU 248 249config CPU_ARM926EJS 250 bool 251 select SYS_CACHE_SHIFT_5 252 imply SYS_ARM_MMU 253 254config CPU_ARM946ES 255 bool 256 select SYS_CACHE_SHIFT_5 257 imply SYS_ARM_MMU 258 259config CPU_ARM1136 260 bool 261 select SYS_CACHE_SHIFT_5 262 imply SYS_ARM_MMU 263 264config CPU_ARM1176 265 bool 266 select HAS_VBAR 267 select SYS_CACHE_SHIFT_5 268 imply SYS_ARM_MMU 269 270config CPU_V7A 271 bool 272 select HAS_THUMB2 273 select HAS_VBAR 274 select SYS_CACHE_SHIFT_6 275 imply SYS_ARM_MMU 276 277config CPU_V7M 278 bool 279 select HAS_THUMB2 280 select SYS_ARM_MPU 281 select SYS_CACHE_SHIFT_5 282 select SYS_THUMB_BUILD 283 select THUMB2_KERNEL 284 285config CPU_V7R 286 bool 287 select HAS_THUMB2 288 select SYS_ARM_CACHE_CP15 289 select SYS_ARM_MPU 290 select SYS_CACHE_SHIFT_6 291 292config CPU_PXA 293 bool 294 select SYS_CACHE_SHIFT_5 295 imply SYS_ARM_MMU 296 297config CPU_SA1100 298 bool 299 select SYS_CACHE_SHIFT_5 300 imply SYS_ARM_MMU 301 302config SYS_CPU 303 default "arm720t" if CPU_ARM720T 304 default "arm920t" if CPU_ARM920T 305 default "arm926ejs" if CPU_ARM926EJS 306 default "arm946es" if CPU_ARM946ES 307 default "arm1136" if CPU_ARM1136 308 default "arm1176" if CPU_ARM1176 309 default "armv7" if CPU_V7A 310 default "armv7" if CPU_V7R 311 default "armv7m" if CPU_V7M 312 default "pxa" if CPU_PXA 313 default "sa1100" if CPU_SA1100 314 default "armv8" if ARM64 315 316config SYS_ARM_ARCH 317 int 318 default 4 if CPU_ARM720T 319 default 4 if CPU_ARM920T 320 default 5 if CPU_ARM926EJS 321 default 5 if CPU_ARM946ES 322 default 6 if CPU_ARM1136 323 default 6 if CPU_ARM1176 324 default 7 if CPU_V7A 325 default 7 if CPU_V7M 326 default 7 if CPU_V7R 327 default 5 if CPU_PXA 328 default 4 if CPU_SA1100 329 default 8 if ARM64 330 331config SYS_CACHE_SHIFT_5 332 bool 333 334config SYS_CACHE_SHIFT_6 335 bool 336 337config SYS_CACHE_SHIFT_7 338 bool 339 340config SYS_CACHELINE_SIZE 341 int 342 default 128 if SYS_CACHE_SHIFT_7 343 default 64 if SYS_CACHE_SHIFT_6 344 default 32 if SYS_CACHE_SHIFT_5 345 346choice 347 prompt "Select the ARM data write cache policy" 348 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \ 349 TARGET_BCMNSP || CPU_PXA || RZA1 350 default SYS_ARM_CACHE_WRITEBACK 351 352config SYS_ARM_CACHE_WRITEBACK 353 bool "Write-back (WB)" 354 help 355 A write updates the cache only and marks the cache line as dirty. 356 External memory is updated only when the line is evicted or explicitly 357 cleaned. 358 359config SYS_ARM_CACHE_WRITETHROUGH 360 bool "Write-through (WT)" 361 help 362 A write updates both the cache and the external memory system. 363 This does not mark the cache line as dirty. 364 365config SYS_ARM_CACHE_WRITEALLOC 366 bool "Write allocation (WA)" 367 help 368 A cache line is allocated on a write miss. This means that executing a 369 store instruction on the processor might cause a burst read to occur. 370 There is a linefill to obtain the data for the cache line, before the 371 write is performed. 372endchoice 373 374config ARCH_CPU_INIT 375 bool "Enable ARCH_CPU_INIT" 376 help 377 Some architectures require a call to arch_cpu_init(). 378 Say Y here to enable it 379 380config SYS_ARCH_TIMER 381 bool "ARM Generic Timer support" 382 depends on CPU_V7A || ARM64 383 default y if ARM64 384 help 385 The ARM Generic Timer (aka arch-timer) provides an architected 386 interface to a timer source on an SoC. 387 It is mandatory for ARMv8 implementation and widely available 388 on ARMv7 systems. 389 390config ARM_SMCCC 391 bool "Support for ARM SMC Calling Convention (SMCCC)" 392 depends on CPU_V7A || ARM64 393 select ARM_PSCI_FW 394 help 395 Say Y here if you want to enable ARM SMC Calling Convention. 396 This should be enabled if U-Boot needs to communicate with system 397 firmware (for example, PSCI) according to SMCCC. 398 399config SEMIHOSTING 400 bool "support boot from semihosting" 401 help 402 In emulated environments, semihosting is a way for 403 the hosted environment to call out to the emulator to 404 retrieve files from the host machine. 405 406config SYS_THUMB_BUILD 407 bool "Build U-Boot using the Thumb instruction set" 408 depends on !ARM64 409 help 410 Use this flag to build U-Boot using the Thumb instruction set for 411 ARM architectures. Thumb instruction set provides better code 412 density. For ARM architectures that support Thumb2 this flag will 413 result in Thumb2 code generated by GCC. 414 415config SPL_SYS_THUMB_BUILD 416 bool "Build SPL using the Thumb instruction set" 417 default y if SYS_THUMB_BUILD 418 depends on !ARM64 && SPL 419 help 420 Use this flag to build SPL using the Thumb instruction set for 421 ARM architectures. Thumb instruction set provides better code 422 density. For ARM architectures that support Thumb2 this flag will 423 result in Thumb2 code generated by GCC. 424 425config TPL_SYS_THUMB_BUILD 426 bool "Build TPL using the Thumb instruction set" 427 default y if SYS_THUMB_BUILD 428 depends on TPL && !ARM64 429 help 430 Use this flag to build TPL using the Thumb instruction set for 431 ARM architectures. Thumb instruction set provides better code 432 density. For ARM architectures that support Thumb2 this flag will 433 result in Thumb2 code generated by GCC. 434 435 436config SYS_L2CACHE_OFF 437 bool "L2cache off" 438 help 439 If SoC does not support L2CACHE or one does not want to enable 440 L2CACHE, choose this option. 441 442config ENABLE_ARM_SOC_BOOT0_HOOK 443 bool "prepare BOOT0 header" 444 help 445 If the SoC's BOOT0 requires a header area filled with (magic) 446 values, then choose this option, and create a file included as 447 <asm/arch/boot0.h> which contains the required assembler code. 448 449config ARM_CORTEX_CPU_IS_UP 450 bool 451 default n 452 453config USE_ARCH_MEMCPY 454 bool "Use an assembly optimized implementation of memcpy" 455 default y 456 depends on !ARM64 457 help 458 Enable the generation of an optimized version of memcpy. 459 Such an implementation may be faster under some conditions 460 but may increase the binary size. 461 462config SPL_USE_ARCH_MEMCPY 463 bool "Use an assembly optimized implementation of memcpy for SPL" 464 default y if USE_ARCH_MEMCPY 465 depends on !ARM64 && SPL 466 help 467 Enable the generation of an optimized version of memcpy. 468 Such an implementation may be faster under some conditions 469 but may increase the binary size. 470 471config TPL_USE_ARCH_MEMCPY 472 bool "Use an assembly optimized implementation of memcpy for TPL" 473 default y if USE_ARCH_MEMCPY 474 depends on !ARM64 && TPL 475 help 476 Enable the generation of an optimized version of memcpy. 477 Such an implementation may be faster under some conditions 478 but may increase the binary size. 479 480config USE_ARCH_MEMSET 481 bool "Use an assembly optimized implementation of memset" 482 default y 483 depends on !ARM64 484 help 485 Enable the generation of an optimized version of memset. 486 Such an implementation may be faster under some conditions 487 but may increase the binary size. 488 489config SPL_USE_ARCH_MEMSET 490 bool "Use an assembly optimized implementation of memset for SPL" 491 default y if USE_ARCH_MEMSET 492 depends on !ARM64 && SPL 493 help 494 Enable the generation of an optimized version of memset. 495 Such an implementation may be faster under some conditions 496 but may increase the binary size. 497 498config TPL_USE_ARCH_MEMSET 499 bool "Use an assembly optimized implementation of memset for TPL" 500 default y if USE_ARCH_MEMSET 501 depends on !ARM64 && TPL 502 help 503 Enable the generation of an optimized version of memset. 504 Such an implementation may be faster under some conditions 505 but may increase the binary size. 506 507config ARM64_SUPPORT_AARCH32 508 bool "ARM64 system support AArch32 execution state" 509 depends on ARM64 510 default y if !TARGET_THUNDERX_88XX 511 help 512 This ARM64 system supports AArch32 execution state. 513 514choice 515 prompt "Target select" 516 default TARGET_HIKEY 517 518config ARCH_AT91 519 bool "Atmel AT91" 520 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB 521 select SPL_SEPARATE_BSS if SPL 522 523config TARGET_EDB93XX 524 bool "Support edb93xx" 525 select CPU_ARM920T 526 select PL010_SERIAL 527 528config TARGET_ASPENITE 529 bool "Support aspenite" 530 select CPU_ARM926EJS 531 532config TARGET_GPLUGD 533 bool "Support gplugd" 534 select CPU_ARM926EJS 535 536config ARCH_DAVINCI 537 bool "TI DaVinci" 538 select CPU_ARM926EJS 539 select SPL_DM_SPI if SPL 540 imply CMD_SAVES 541 help 542 Support for TI's DaVinci platform. 543 544config ARCH_KIRKWOOD 545 bool "Marvell Kirkwood" 546 select ARCH_MISC_INIT 547 select BOARD_EARLY_INIT_F 548 select CPU_ARM926EJS 549 550config ARCH_MVEBU 551 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)" 552 select DM 553 select DM_ETH 554 select DM_SERIAL 555 select DM_SPI 556 select DM_SPI_FLASH 557 select SPL_DM_SPI if SPL 558 select SPL_DM_SPI_FLASH if SPL 559 select OF_CONTROL 560 select OF_SEPARATE 561 select SPI 562 imply CMD_DM 563 564config TARGET_APF27 565 bool "Support apf27" 566 select CPU_ARM926EJS 567 select SUPPORT_SPL 568 569config ARCH_ORION5X 570 bool "Marvell Orion" 571 select CPU_ARM926EJS 572 573config TARGET_SPEAR300 574 bool "Support spear300" 575 select BOARD_EARLY_INIT_F 576 select CPU_ARM926EJS 577 select PL011_SERIAL 578 imply CMD_SAVES 579 580config TARGET_SPEAR310 581 bool "Support spear310" 582 select BOARD_EARLY_INIT_F 583 select CPU_ARM926EJS 584 select PL011_SERIAL 585 imply CMD_SAVES 586 587config TARGET_SPEAR320 588 bool "Support spear320" 589 select BOARD_EARLY_INIT_F 590 select CPU_ARM926EJS 591 select PL011_SERIAL 592 imply CMD_SAVES 593 594config TARGET_SPEAR600 595 bool "Support spear600" 596 select BOARD_EARLY_INIT_F 597 select CPU_ARM926EJS 598 select PL011_SERIAL 599 imply CMD_SAVES 600 601config TARGET_STV0991 602 bool "Support stv0991" 603 select CPU_V7A 604 select DM 605 select DM_SERIAL 606 select DM_SPI 607 select DM_SPI_FLASH 608 select PL01X_SERIAL 609 select SPI 610 select SPI_FLASH 611 imply CMD_DM 612 613config TARGET_X600 614 bool "Support x600" 615 select BOARD_LATE_INIT 616 select CPU_ARM926EJS 617 select PL011_SERIAL 618 select SUPPORT_SPL 619 620config TARGET_FLEA3 621 bool "Support flea3" 622 select CPU_ARM1136 623 624config ARCH_BCM283X 625 bool "Broadcom BCM283X family" 626 select DM 627 select DM_GPIO 628 select DM_SERIAL 629 select OF_CONTROL 630 select PL01X_SERIAL 631 select SERIAL_SEARCH_ALL 632 imply CMD_DM 633 imply FAT_WRITE 634 635config ARCH_BCM63158 636 bool "Broadcom BCM63158 family" 637 select DM 638 select OF_CONTROL 639 imply CMD_DM 640 641config ARCH_BCM68360 642 bool "Broadcom BCM68360 family" 643 select DM 644 select OF_CONTROL 645 imply CMD_DM 646 647config ARCH_BCM6858 648 bool "Broadcom BCM6858 family" 649 select DM 650 select OF_CONTROL 651 imply CMD_DM 652 653config TARGET_VEXPRESS_CA15_TC2 654 bool "Support vexpress_ca15_tc2" 655 select CPU_V7A 656 select CPU_V7_HAS_NONSEC 657 select CPU_V7_HAS_VIRT 658 select PL011_SERIAL 659 660config ARCH_BCMSTB 661 bool "Broadcom BCM7XXX family" 662 select CPU_V7A 663 select DM 664 select OF_CONTROL 665 select OF_PRIOR_STAGE 666 imply CMD_DM 667 help 668 This enables support for Broadcom ARM-based set-top box 669 chipsets, including the 7445 family of chips. 670 671config TARGET_VEXPRESS_CA5X2 672 bool "Support vexpress_ca5x2" 673 select CPU_V7A 674 select PL011_SERIAL 675 676config TARGET_VEXPRESS_CA9X4 677 bool "Support vexpress_ca9x4" 678 select CPU_V7A 679 select PL011_SERIAL 680 681config TARGET_BCM23550_W1D 682 bool "Support bcm23550_w1d" 683 select CPU_V7A 684 imply CRC32_VERIFY 685 imply FAT_WRITE 686 687config TARGET_BCM28155_AP 688 bool "Support bcm28155_ap" 689 select CPU_V7A 690 imply CRC32_VERIFY 691 imply FAT_WRITE 692 693config TARGET_BCMCYGNUS 694 bool "Support bcmcygnus" 695 select CPU_V7A 696 imply BCM_SF2_ETH 697 imply BCM_SF2_ETH_GMAC 698 imply CMD_HASH 699 imply CRC32_VERIFY 700 imply FAT_WRITE 701 imply HASH_VERIFY 702 imply NETDEVICES 703 704config TARGET_BCMNSP 705 bool "Support bcmnsp" 706 select CPU_V7A 707 708config TARGET_BCMNS2 709 bool "Support Broadcom Northstar2" 710 select ARM64 711 help 712 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit 713 ARMv8 Cortex-A57 processors targeting a broad range of networking 714 applications. 715 716config TARGET_BCMNS3 717 bool "Support Broadcom NS3" 718 select ARM64 719 select BOARD_LATE_INIT 720 help 721 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit 722 ARMv8 Cortex-A72 processors targeting a broad range of networking 723 applications. 724 725config ARCH_EXYNOS 726 bool "Samsung EXYNOS" 727 select DM 728 select DM_GPIO 729 select DM_I2C 730 select DM_KEYBOARD 731 select DM_SERIAL 732 select DM_SPI 733 select DM_SPI_FLASH 734 select SPI 735 imply SYS_THUMB_BUILD 736 imply CMD_DM 737 imply FAT_WRITE 738 739config ARCH_S5PC1XX 740 bool "Samsung S5PC1XX" 741 select CPU_V7A 742 select DM 743 select DM_GPIO 744 select DM_I2C 745 select DM_SERIAL 746 imply CMD_DM 747 748config ARCH_HIGHBANK 749 bool "Calxeda Highbank" 750 select CPU_V7A 751 select PL011_SERIAL 752 753config ARCH_INTEGRATOR 754 bool "ARM Ltd. Integrator family" 755 select DM 756 select DM_SERIAL 757 select PL01X_SERIAL 758 imply CMD_DM 759 760config ARCH_IPQ40XX 761 bool "Qualcomm IPQ40xx SoCs" 762 select CPU_V7A 763 select DM 764 select DM_GPIO 765 select DM_SERIAL 766 select DM_RESET 767 select MSM_SMEM 768 select PINCTRL 769 select CLK 770 select SMEM 771 select OF_CONTROL 772 imply CMD_DM 773 774config ARCH_KEYSTONE 775 bool "TI Keystone" 776 select CMD_POWEROFF 777 select CPU_V7A 778 select SUPPORT_SPL 779 select SYS_ARCH_TIMER 780 select SYS_THUMB_BUILD 781 imply CMD_MTDPARTS 782 imply CMD_SAVES 783 imply FIT 784 785config ARCH_K3 786 bool "Texas Instruments' K3 Architecture" 787 select SPL 788 select SUPPORT_SPL 789 select FIT 790 791config ARCH_OMAP2PLUS 792 bool "TI OMAP2+" 793 select CPU_V7A 794 select SPL_BOARD_INIT if SPL 795 select SPL_STACK_R if SPL 796 select SUPPORT_SPL 797 imply TI_SYSC if DM && OF_CONTROL 798 imply FIT 799 800config ARCH_MESON 801 bool "Amlogic Meson" 802 imply DISTRO_DEFAULTS 803 imply DM_RNG 804 help 805 Support for the Meson SoC family developed by Amlogic Inc., 806 targeted at media players and tablet computers. We currently 807 support the S905 (GXBaby) 64-bit SoC. 808 809config ARCH_MEDIATEK 810 bool "MediaTek SoCs" 811 select DM 812 select OF_CONTROL 813 select SPL_DM if SPL 814 select SPL_LIBCOMMON_SUPPORT if SPL 815 select SPL_LIBGENERIC_SUPPORT if SPL 816 select SPL_OF_CONTROL if SPL 817 select SUPPORT_SPL 818 help 819 Support for the MediaTek SoCs family developed by MediaTek Inc. 820 Please refer to doc/README.mediatek for more information. 821 822config ARCH_LPC32XX 823 bool "NXP LPC32xx platform" 824 select CPU_ARM926EJS 825 select DM 826 select DM_GPIO 827 select DM_SERIAL 828 select SPL_DM if SPL 829 select SUPPORT_SPL 830 imply CMD_DM 831 832config ARCH_IMX8 833 bool "NXP i.MX8 platform" 834 select ARM64 835 select DM 836 select OF_CONTROL 837 select ENABLE_ARM_SOC_BOOT0_HOOK 838 839config ARCH_IMX8M 840 bool "NXP i.MX8M platform" 841 select ARM64 842 select DM 843 select SUPPORT_SPL 844 imply CMD_DM 845 846config ARCH_IMXRT 847 bool "NXP i.MXRT platform" 848 select CPU_V7M 849 select DM 850 select DM_SERIAL 851 select SUPPORT_SPL 852 imply CMD_DM 853 854config ARCH_MX23 855 bool "NXP i.MX23 family" 856 select CPU_ARM926EJS 857 select PL011_SERIAL 858 select SUPPORT_SPL 859 860config ARCH_MX25 861 bool "NXP MX25" 862 select CPU_ARM926EJS 863 imply MXC_GPIO 864 865config ARCH_MX28 866 bool "NXP i.MX28 family" 867 select CPU_ARM926EJS 868 select PL011_SERIAL 869 select SUPPORT_SPL 870 871config ARCH_MX31 872 bool "NXP i.MX31 family" 873 select CPU_ARM1136 874 875config ARCH_MX7ULP 876 bool "NXP MX7ULP" 877 select CPU_V7A 878 select ROM_UNIFIED_SECTIONS 879 imply MXC_GPIO 880 imply SYS_THUMB_BUILD 881 882config ARCH_MX7 883 bool "Freescale MX7" 884 select ARCH_MISC_INIT 885 select CPU_V7A 886 select SYS_FSL_HAS_SEC if IMX_HAB 887 select SYS_FSL_SEC_COMPAT_4 888 select SYS_FSL_SEC_LE 889 imply BOARD_EARLY_INIT_F 890 imply MXC_GPIO 891 imply SYS_THUMB_BUILD 892 893config ARCH_MX6 894 bool "Freescale MX6" 895 select CPU_V7A 896 select SYS_FSL_HAS_SEC 897 select SYS_FSL_SEC_COMPAT_4 898 select SYS_FSL_SEC_LE 899 imply MXC_GPIO 900 imply SYS_THUMB_BUILD 901 902if ARCH_MX6 903config SPL_LDSCRIPT 904 default "arch/arm/mach-omap2/u-boot-spl.lds" 905endif 906 907config ARCH_MX5 908 bool "Freescale MX5" 909 select BOARD_EARLY_INIT_F 910 select CPU_V7A 911 imply MXC_GPIO 912 913config ARCH_NEXELL 914 bool "Nexell S5P4418/S5P6818 SoC" 915 select ENABLE_ARM_SOC_BOOT0_HOOK 916 select DM 917 918config ARCH_OWL 919 bool "Actions Semi OWL SoCs" 920 select DM 921 select DM_ETH 922 select DM_SERIAL 923 select OWL_SERIAL 924 select CLK 925 select CLK_OWL 926 select OF_CONTROL 927 select SYS_RELOC_GD_ENV_ADDR 928 imply CMD_DM 929 930config ARCH_QEMU 931 bool "QEMU Virtual Platform" 932 select DM 933 select DM_SERIAL 934 select OF_CONTROL 935 select PL01X_SERIAL 936 imply CMD_DM 937 imply DM_RNG 938 imply DM_RTC 939 imply RTC_PL031 940 941config ARCH_RMOBILE 942 bool "Renesas ARM SoCs" 943 select DM 944 select DM_SERIAL 945 imply BOARD_EARLY_INIT_F 946 imply CMD_DM 947 imply FAT_WRITE 948 imply SYS_THUMB_BUILD 949 imply ARCH_MISC_INIT if DISPLAY_CPUINFO 950 951config TARGET_S32V234EVB 952 bool "Support s32v234evb" 953 select ARM64 954 select SYS_FSL_ERRATUM_ESDHC111 955 956config ARCH_SNAPDRAGON 957 bool "Qualcomm Snapdragon SoCs" 958 select ARM64 959 select DM 960 select DM_GPIO 961 select DM_SERIAL 962 select MSM_SMEM 963 select OF_CONTROL 964 select OF_SEPARATE 965 select SMEM 966 select SPMI 967 imply CMD_DM 968 969config ARCH_SOCFPGA 970 bool "Altera SOCFPGA family" 971 select ARCH_EARLY_INIT_R 972 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10 973 select ARM64 if TARGET_SOCFPGA_SOC64 974 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 975 select DM 976 select DM_SERIAL 977 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 978 select OF_CONTROL 979 select SPL_DM_RESET if DM_RESET 980 select SPL_DM_SERIAL 981 select SPL_LIBCOMMON_SUPPORT 982 select SPL_LIBGENERIC_SUPPORT 983 select SPL_NAND_SUPPORT if SPL_NAND_DENALI 984 select SPL_OF_CONTROL 985 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64 986 select SPL_SERIAL_SUPPORT 987 select SPL_SYSRESET 988 select SPL_WATCHDOG_SUPPORT 989 select SUPPORT_SPL 990 select SYS_NS16550 991 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 992 select SYSRESET 993 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 994 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64 995 imply CMD_DM 996 imply CMD_MTDPARTS 997 imply CRC32_VERIFY 998 imply DM_SPI 999 imply DM_SPI_FLASH 1000 imply FAT_WRITE 1001 imply SPL 1002 imply SPL_DM 1003 imply SPL_DM_SPI 1004 imply SPL_DM_SPI_FLASH 1005 imply SPL_LIBDISK_SUPPORT 1006 imply SPL_MMC_SUPPORT 1007 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION 1008 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE 1009 imply SPL_SPI_FLASH_SUPPORT 1010 imply SPL_SPI_SUPPORT 1011 imply L2X0_CACHE 1012 1013config ARCH_SUNXI 1014 bool "Support sunxi (Allwinner) SoCs" 1015 select BINMAN 1016 select CMD_GPIO 1017 select CMD_MMC if MMC 1018 select CMD_USB if DISTRO_DEFAULTS 1019 select CLK 1020 select DM 1021 select DM_ETH 1022 select DM_GPIO 1023 select DM_KEYBOARD 1024 select DM_MMC if MMC 1025 select DM_SCSI if SCSI 1026 select DM_SERIAL 1027 select DM_USB if DISTRO_DEFAULTS 1028 select OF_BOARD_SETUP 1029 select OF_CONTROL 1030 select OF_SEPARATE 1031 select SPECIFY_CONSOLE_INDEX 1032 select SPL_STACK_R if SPL 1033 select SPL_SYS_MALLOC_SIMPLE if SPL 1034 select SPL_SYS_THUMB_BUILD if !ARM64 1035 select SUNXI_GPIO 1036 select SYS_NS16550 1037 select SYS_THUMB_BUILD if !ARM64 1038 select USB if DISTRO_DEFAULTS 1039 select USB_KEYBOARD if DISTRO_DEFAULTS 1040 select USB_STORAGE if DISTRO_DEFAULTS 1041 select SPL_USE_TINY_PRINTF 1042 select USE_PREBOOT 1043 select SYS_RELOC_GD_ENV_ADDR 1044 imply BOARD_LATE_INIT 1045 imply CMD_DM 1046 imply CMD_GPT 1047 imply CMD_UBI if MTD_RAW_NAND 1048 imply DISTRO_DEFAULTS 1049 imply FAT_WRITE 1050 imply FIT 1051 imply OF_LIBFDT_OVERLAY 1052 imply PRE_CONSOLE_BUFFER 1053 imply SPL_GPIO_SUPPORT 1054 imply SPL_LIBCOMMON_SUPPORT 1055 imply SPL_LIBGENERIC_SUPPORT 1056 imply SPL_MMC_SUPPORT if MMC 1057 imply SPL_POWER_SUPPORT 1058 imply SPL_SERIAL_SUPPORT 1059 imply USB_GADGET 1060 1061config ARCH_U8500 1062 bool "ST-Ericsson U8500 Series" 1063 select CPU_V7A 1064 select DM 1065 select DM_GPIO 1066 select DM_MMC if MMC 1067 select DM_SERIAL 1068 select DM_USB if USB 1069 select OF_CONTROL 1070 select SYSRESET 1071 select TIMER 1072 imply ARM_PL180_MMCI 1073 imply DM_RTC 1074 imply NOMADIK_MTU_TIMER 1075 imply PL01X_SERIAL 1076 imply RTC_PL031 1077 imply SYSRESET_SYSCON 1078 1079config ARCH_VERSAL 1080 bool "Support Xilinx Versal Platform" 1081 select ARM64 1082 select CLK 1083 select DM 1084 select DM_ETH if NET 1085 select DM_MMC if MMC 1086 select DM_SERIAL 1087 select OF_CONTROL 1088 imply BOARD_LATE_INIT 1089 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1090 1091config ARCH_VF610 1092 bool "Freescale Vybrid" 1093 select CPU_V7A 1094 select SYS_FSL_ERRATUM_ESDHC111 1095 imply CMD_MTDPARTS 1096 imply MTD_RAW_NAND 1097 1098config ARCH_ZYNQ 1099 bool "Xilinx Zynq based platform" 1100 select CLK 1101 select CLK_ZYNQ 1102 select CPU_V7A 1103 select DM 1104 select DM_ETH if NET 1105 select DM_MMC if MMC 1106 select DM_SERIAL 1107 select DM_SPI 1108 select DM_SPI_FLASH 1109 select DM_USB if USB 1110 select OF_CONTROL 1111 select SPI 1112 select SPL_BOARD_INIT if SPL 1113 select SPL_CLK if SPL 1114 select SPL_DM if SPL 1115 select SPL_DM_SPI if SPL 1116 select SPL_DM_SPI_FLASH if SPL 1117 select SPL_OF_CONTROL if SPL 1118 select SPL_SEPARATE_BSS if SPL 1119 select SUPPORT_SPL 1120 imply ARCH_EARLY_INIT_R 1121 imply BOARD_LATE_INIT 1122 imply CMD_CLK 1123 imply CMD_DM 1124 imply CMD_SPL 1125 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1126 imply FAT_WRITE 1127 1128config ARCH_ZYNQMP_R5 1129 bool "Xilinx ZynqMP R5 based platform" 1130 select CLK 1131 select CPU_V7R 1132 select DM 1133 select DM_ETH if NET 1134 select DM_MMC if MMC 1135 select DM_SERIAL 1136 select OF_CONTROL 1137 imply CMD_DM 1138 imply DM_USB_GADGET 1139 1140config ARCH_ZYNQMP 1141 bool "Xilinx ZynqMP based platform" 1142 select ARM64 1143 select CLK 1144 select DM 1145 select DM_ETH if NET 1146 select DM_MAILBOX 1147 select DM_MMC if MMC 1148 select DM_SERIAL 1149 select DM_SPI if SPI 1150 select DM_SPI_FLASH if DM_SPI 1151 select DM_USB if USB 1152 select FIRMWARE 1153 select OF_CONTROL 1154 select SPL_BOARD_INIT if SPL 1155 select SPL_CLK if SPL 1156 select SPL_DM if SPL 1157 select SPL_DM_SPI if SPI && SPL_DM 1158 select SPL_DM_SPI_FLASH if SPL_DM_SPI 1159 select SPL_DM_MAILBOX if SPL 1160 select SPL_FIRMWARE if SPL 1161 select SPL_SEPARATE_BSS if SPL 1162 select SUPPORT_SPL 1163 select ZYNQMP_IPI 1164 imply BOARD_LATE_INIT 1165 imply CMD_DM 1166 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1167 imply FAT_WRITE 1168 imply MP 1169 imply DM_USB_GADGET 1170 1171config ARCH_TEGRA 1172 bool "NVIDIA Tegra" 1173 imply DISTRO_DEFAULTS 1174 imply FAT_WRITE 1175 1176config TARGET_VEXPRESS64_AEMV8A 1177 bool "Support vexpress_aemv8a" 1178 select ARM64 1179 select PL01X_SERIAL 1180 1181config TARGET_VEXPRESS64_BASE_FVP 1182 bool "Support Versatile Express ARMv8a FVP BASE model" 1183 select ARM64 1184 select PL01X_SERIAL 1185 select SEMIHOSTING 1186 1187config TARGET_VEXPRESS64_JUNO 1188 bool "Support Versatile Express Juno Development Platform" 1189 select ARM64 1190 select PL01X_SERIAL 1191 select DM 1192 select OF_CONTROL 1193 select OF_BOARD 1194 select CLK 1195 select DM_SERIAL 1196 select ARM_PSCI_FW 1197 select PSCI_RESET 1198 select DM_ETH 1199 select BLK 1200 select USB 1201 select DM_USB 1202 1203config TARGET_TOTAL_COMPUTE 1204 bool "Support Total Compute Platform" 1205 select ARM64 1206 select PL01X_SERIAL 1207 select DM 1208 select DM_SERIAL 1209 select DM_MMC 1210 select DM_GPIO 1211 1212config TARGET_LS2080A_EMU 1213 bool "Support ls2080a_emu" 1214 select ARCH_LS2080A 1215 select ARM64 1216 select ARMV8_MULTIENTRY 1217 select FSL_DDR_SYNC_REFRESH 1218 help 1219 Support for Freescale LS2080A_EMU platform. 1220 The LS2080A Development System (EMULATOR) is a pre-silicon 1221 development platform that supports the QorIQ LS2080A 1222 Layerscape Architecture processor. 1223 1224config TARGET_LS1088AQDS 1225 bool "Support ls1088aqds" 1226 select ARCH_LS1088A 1227 select ARM64 1228 select ARMV8_MULTIENTRY 1229 select ARCH_SUPPORT_TFABOOT 1230 select BOARD_LATE_INIT 1231 select SUPPORT_SPL 1232 select FSL_DDR_INTERACTIVE if !SD_BOOT 1233 help 1234 Support for NXP LS1088AQDS platform. 1235 The LS1088A Development System (QDS) is a high-performance 1236 development platform that supports the QorIQ LS1088A 1237 Layerscape Architecture processor. 1238 1239config TARGET_LS2080AQDS 1240 bool "Support ls2080aqds" 1241 select ARCH_LS2080A 1242 select ARM64 1243 select ARMV8_MULTIENTRY 1244 select ARCH_SUPPORT_TFABOOT 1245 select BOARD_LATE_INIT 1246 select SUPPORT_SPL 1247 imply SCSI 1248 imply SCSI_AHCI 1249 select FSL_DDR_BIST 1250 select FSL_DDR_INTERACTIVE if !SPL 1251 help 1252 Support for Freescale LS2080AQDS platform. 1253 The LS2080A Development System (QDS) is a high-performance 1254 development platform that supports the QorIQ LS2080A 1255 Layerscape Architecture processor. 1256 1257config TARGET_LS2080ARDB 1258 bool "Support ls2080ardb" 1259 select ARCH_LS2080A 1260 select ARM64 1261 select ARMV8_MULTIENTRY 1262 select ARCH_SUPPORT_TFABOOT 1263 select BOARD_LATE_INIT 1264 select SUPPORT_SPL 1265 select FSL_DDR_BIST 1266 select FSL_DDR_INTERACTIVE if !SPL 1267 imply SCSI 1268 imply SCSI_AHCI 1269 help 1270 Support for Freescale LS2080ARDB platform. 1271 The LS2080A Reference design board (RDB) is a high-performance 1272 development platform that supports the QorIQ LS2080A 1273 Layerscape Architecture processor. 1274 1275config TARGET_LS2081ARDB 1276 bool "Support ls2081ardb" 1277 select ARCH_LS2080A 1278 select ARM64 1279 select ARMV8_MULTIENTRY 1280 select BOARD_LATE_INIT 1281 select SUPPORT_SPL 1282 help 1283 Support for Freescale LS2081ARDB platform. 1284 The LS2081A Reference design board (RDB) is a high-performance 1285 development platform that supports the QorIQ LS2081A/LS2041A 1286 Layerscape Architecture processor. 1287 1288config TARGET_LX2160ARDB 1289 bool "Support lx2160ardb" 1290 select ARCH_LX2160A 1291 select ARM64 1292 select ARMV8_MULTIENTRY 1293 select ARCH_SUPPORT_TFABOOT 1294 select BOARD_LATE_INIT 1295 help 1296 Support for NXP LX2160ARDB platform. 1297 The lx2160ardb (LX2160A Reference design board (RDB) 1298 is a high-performance development platform that supports the 1299 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. 1300 1301config TARGET_LX2160AQDS 1302 bool "Support lx2160aqds" 1303 select ARCH_LX2160A 1304 select ARM64 1305 select ARMV8_MULTIENTRY 1306 select ARCH_SUPPORT_TFABOOT 1307 select BOARD_LATE_INIT 1308 help 1309 Support for NXP LX2160AQDS platform. 1310 The lx2160aqds (LX2160A QorIQ Development System (QDS) 1311 is a high-performance development platform that supports the 1312 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. 1313 1314config TARGET_LX2162AQDS 1315 bool "Support lx2162aqds" 1316 select ARCH_LX2162A 1317 select ARCH_MISC_INIT 1318 select ARM64 1319 select ARMV8_MULTIENTRY 1320 select ARCH_SUPPORT_TFABOOT 1321 select BOARD_LATE_INIT 1322 help 1323 Support for NXP LX2162AQDS platform. 1324 The lx2162aqds support is based on LX2160A Layerscape Architecture processor. 1325 1326config TARGET_HIKEY 1327 bool "Support HiKey 96boards Consumer Edition Platform" 1328 select ARM64 1329 select DM 1330 select DM_GPIO 1331 select DM_SERIAL 1332 select OF_CONTROL 1333 select PL01X_SERIAL 1334 select SPECIFY_CONSOLE_INDEX 1335 imply CMD_DM 1336 help 1337 Support for HiKey 96boards platform. It features a HI6220 1338 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM. 1339 1340config TARGET_HIKEY960 1341 bool "Support HiKey960 96boards Consumer Edition Platform" 1342 select ARM64 1343 select DM 1344 select DM_SERIAL 1345 select OF_CONTROL 1346 select PL01X_SERIAL 1347 imply CMD_DM 1348 help 1349 Support for HiKey960 96boards platform. It features a HI3660 1350 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM. 1351 1352config TARGET_POPLAR 1353 bool "Support Poplar 96boards Enterprise Edition Platform" 1354 select ARM64 1355 select DM 1356 select DM_SERIAL 1357 select DM_USB 1358 select OF_CONTROL 1359 select PL01X_SERIAL 1360 imply CMD_DM 1361 help 1362 Support for Poplar 96boards EE platform. It features a HI3798cv200 1363 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU 1364 making it capable of running any commercial set-top solution based on 1365 Linux or Android. 1366 1367config TARGET_LS1012AQDS 1368 bool "Support ls1012aqds" 1369 select ARCH_LS1012A 1370 select ARM64 1371 select ARCH_SUPPORT_TFABOOT 1372 select BOARD_LATE_INIT 1373 help 1374 Support for Freescale LS1012AQDS platform. 1375 The LS1012A Development System (QDS) is a high-performance 1376 development platform that supports the QorIQ LS1012A 1377 Layerscape Architecture processor. 1378 1379config TARGET_LS1012ARDB 1380 bool "Support ls1012ardb" 1381 select ARCH_LS1012A 1382 select ARM64 1383 select ARCH_SUPPORT_TFABOOT 1384 select BOARD_LATE_INIT 1385 imply SCSI 1386 imply SCSI_AHCI 1387 help 1388 Support for Freescale LS1012ARDB platform. 1389 The LS1012A Reference design board (RDB) is a high-performance 1390 development platform that supports the QorIQ LS1012A 1391 Layerscape Architecture processor. 1392 1393config TARGET_LS1012A2G5RDB 1394 bool "Support ls1012a2g5rdb" 1395 select ARCH_LS1012A 1396 select ARM64 1397 select ARCH_SUPPORT_TFABOOT 1398 select BOARD_LATE_INIT 1399 imply SCSI 1400 help 1401 Support for Freescale LS1012A2G5RDB platform. 1402 The LS1012A 2G5 Reference design board (RDB) is a high-performance 1403 development platform that supports the QorIQ LS1012A 1404 Layerscape Architecture processor. 1405 1406config TARGET_LS1012AFRWY 1407 bool "Support ls1012afrwy" 1408 select ARCH_LS1012A 1409 select ARM64 1410 select ARCH_SUPPORT_TFABOOT 1411 select BOARD_LATE_INIT 1412 imply SCSI 1413 imply SCSI_AHCI 1414 help 1415 Support for Freescale LS1012AFRWY platform. 1416 The LS1012A FRWY board (FRWY) is a high-performance 1417 development platform that supports the QorIQ LS1012A 1418 Layerscape Architecture processor. 1419 1420config TARGET_LS1012AFRDM 1421 bool "Support ls1012afrdm" 1422 select ARCH_LS1012A 1423 select ARM64 1424 select ARCH_SUPPORT_TFABOOT 1425 help 1426 Support for Freescale LS1012AFRDM platform. 1427 The LS1012A Freedom board (FRDM) is a high-performance 1428 development platform that supports the QorIQ LS1012A 1429 Layerscape Architecture processor. 1430 1431config TARGET_LS1028AQDS 1432 bool "Support ls1028aqds" 1433 select ARCH_LS1028A 1434 select ARM64 1435 select ARMV8_MULTIENTRY 1436 select ARCH_SUPPORT_TFABOOT 1437 select BOARD_LATE_INIT 1438 help 1439 Support for Freescale LS1028AQDS platform 1440 The LS1028A Development System (QDS) is a high-performance 1441 development platform that supports the QorIQ LS1028A 1442 Layerscape Architecture processor. 1443 1444config TARGET_LS1028ARDB 1445 bool "Support ls1028ardb" 1446 select ARCH_LS1028A 1447 select ARM64 1448 select ARMV8_MULTIENTRY 1449 select ARCH_SUPPORT_TFABOOT 1450 select BOARD_LATE_INIT 1451 help 1452 Support for Freescale LS1028ARDB platform 1453 The LS1028A Development System (RDB) is a high-performance 1454 development platform that supports the QorIQ LS1028A 1455 Layerscape Architecture processor. 1456 1457config TARGET_LS1088ARDB 1458 bool "Support ls1088ardb" 1459 select ARCH_LS1088A 1460 select ARM64 1461 select ARMV8_MULTIENTRY 1462 select ARCH_SUPPORT_TFABOOT 1463 select BOARD_LATE_INIT 1464 select SUPPORT_SPL 1465 select FSL_DDR_INTERACTIVE if !SD_BOOT 1466 help 1467 Support for NXP LS1088ARDB platform. 1468 The LS1088A Reference design board (RDB) is a high-performance 1469 development platform that supports the QorIQ LS1088A 1470 Layerscape Architecture processor. 1471 1472config TARGET_LS1021AQDS 1473 bool "Support ls1021aqds" 1474 select ARCH_LS1021A 1475 select ARCH_SUPPORT_PSCI 1476 select BOARD_EARLY_INIT_F 1477 select BOARD_LATE_INIT 1478 select CPU_V7A 1479 select CPU_V7_HAS_NONSEC 1480 select CPU_V7_HAS_VIRT 1481 select LS1_DEEP_SLEEP 1482 select SUPPORT_SPL 1483 select SYS_FSL_DDR 1484 select FSL_DDR_INTERACTIVE 1485 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI 1486 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI 1487 imply SCSI 1488 1489config TARGET_LS1021ATWR 1490 bool "Support ls1021atwr" 1491 select ARCH_LS1021A 1492 select ARCH_SUPPORT_PSCI 1493 select BOARD_EARLY_INIT_F 1494 select BOARD_LATE_INIT 1495 select CPU_V7A 1496 select CPU_V7_HAS_NONSEC 1497 select CPU_V7_HAS_VIRT 1498 select LS1_DEEP_SLEEP 1499 select SUPPORT_SPL 1500 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI 1501 imply SCSI 1502 1503config TARGET_LS1021ATSN 1504 bool "Support ls1021atsn" 1505 select ARCH_LS1021A 1506 select ARCH_SUPPORT_PSCI 1507 select BOARD_EARLY_INIT_F 1508 select BOARD_LATE_INIT 1509 select CPU_V7A 1510 select CPU_V7_HAS_NONSEC 1511 select CPU_V7_HAS_VIRT 1512 select LS1_DEEP_SLEEP 1513 select SUPPORT_SPL 1514 imply SCSI 1515 1516config TARGET_LS1021AIOT 1517 bool "Support ls1021aiot" 1518 select ARCH_LS1021A 1519 select ARCH_SUPPORT_PSCI 1520 select BOARD_LATE_INIT 1521 select CPU_V7A 1522 select CPU_V7_HAS_NONSEC 1523 select CPU_V7_HAS_VIRT 1524 select SUPPORT_SPL 1525 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI 1526 imply SCSI 1527 help 1528 Support for Freescale LS1021AIOT platform. 1529 The LS1021A Freescale board (IOT) is a high-performance 1530 development platform that supports the QorIQ LS1021A 1531 Layerscape Architecture processor. 1532 1533config TARGET_LS1043AQDS 1534 bool "Support ls1043aqds" 1535 select ARCH_LS1043A 1536 select ARM64 1537 select ARMV8_MULTIENTRY 1538 select ARCH_SUPPORT_TFABOOT 1539 select BOARD_EARLY_INIT_F 1540 select BOARD_LATE_INIT 1541 select SUPPORT_SPL 1542 select FSL_DDR_INTERACTIVE if !SPL 1543 select FSL_DSPI if !SPL_NO_DSPI 1544 select DM_SPI_FLASH if FSL_DSPI 1545 imply SCSI 1546 imply SCSI_AHCI 1547 help 1548 Support for Freescale LS1043AQDS platform. 1549 1550config TARGET_LS1043ARDB 1551 bool "Support ls1043ardb" 1552 select ARCH_LS1043A 1553 select ARM64 1554 select ARMV8_MULTIENTRY 1555 select ARCH_SUPPORT_TFABOOT 1556 select BOARD_EARLY_INIT_F 1557 select BOARD_LATE_INIT 1558 select SUPPORT_SPL 1559 select FSL_DSPI if !SPL_NO_DSPI 1560 select DM_SPI_FLASH if FSL_DSPI 1561 help 1562 Support for Freescale LS1043ARDB platform. 1563 1564config TARGET_LS1046AQDS 1565 bool "Support ls1046aqds" 1566 select ARCH_LS1046A 1567 select ARM64 1568 select ARMV8_MULTIENTRY 1569 select ARCH_SUPPORT_TFABOOT 1570 select BOARD_EARLY_INIT_F 1571 select BOARD_LATE_INIT 1572 select DM_SPI_FLASH if DM_SPI 1573 select SUPPORT_SPL 1574 select FSL_DDR_BIST if !SPL 1575 select FSL_DDR_INTERACTIVE if !SPL 1576 select FSL_DDR_INTERACTIVE if !SPL 1577 imply SCSI 1578 help 1579 Support for Freescale LS1046AQDS platform. 1580 The LS1046A Development System (QDS) is a high-performance 1581 development platform that supports the QorIQ LS1046A 1582 Layerscape Architecture processor. 1583 1584config TARGET_LS1046ARDB 1585 bool "Support ls1046ardb" 1586 select ARCH_LS1046A 1587 select ARM64 1588 select ARMV8_MULTIENTRY 1589 select ARCH_SUPPORT_TFABOOT 1590 select BOARD_EARLY_INIT_F 1591 select BOARD_LATE_INIT 1592 select DM_SPI_FLASH if DM_SPI 1593 select POWER_MC34VR500 1594 select SUPPORT_SPL 1595 select FSL_DDR_BIST 1596 select FSL_DDR_INTERACTIVE if !SPL 1597 imply SCSI 1598 help 1599 Support for Freescale LS1046ARDB platform. 1600 The LS1046A Reference Design Board (RDB) is a high-performance 1601 development platform that supports the QorIQ LS1046A 1602 Layerscape Architecture processor. 1603 1604config TARGET_LS1046AFRWY 1605 bool "Support ls1046afrwy" 1606 select ARCH_LS1046A 1607 select ARM64 1608 select ARMV8_MULTIENTRY 1609 select ARCH_SUPPORT_TFABOOT 1610 select BOARD_EARLY_INIT_F 1611 select BOARD_LATE_INIT 1612 select DM_SPI_FLASH if DM_SPI 1613 imply SCSI 1614 help 1615 Support for Freescale LS1046AFRWY platform. 1616 The LS1046A Freeway Board (FRWY) is a high-performance 1617 development platform that supports the QorIQ LS1046A 1618 Layerscape Architecture processor. 1619 1620config TARGET_SL28 1621 bool "Support sl28" 1622 select ARCH_LS1028A 1623 select ARM64 1624 select ARMV8_MULTIENTRY 1625 select SUPPORT_SPL 1626 select BINMAN 1627 help 1628 Support for Kontron SMARC-sAL28 board. 1629 1630config TARGET_COLIBRI_PXA270 1631 bool "Support colibri_pxa270" 1632 select CPU_PXA 1633 1634config ARCH_UNIPHIER 1635 bool "Socionext UniPhier SoCs" 1636 select BOARD_LATE_INIT 1637 select DM 1638 select DM_ETH 1639 select DM_GPIO 1640 select DM_I2C 1641 select DM_MMC 1642 select DM_MTD 1643 select DM_RESET 1644 select DM_SERIAL 1645 select DM_USB 1646 select OF_BOARD_SETUP 1647 select OF_CONTROL 1648 select OF_LIBFDT 1649 select PINCTRL 1650 select SPL_BOARD_INIT if SPL 1651 select SPL_DM if SPL 1652 select SPL_LIBCOMMON_SUPPORT if SPL 1653 select SPL_LIBGENERIC_SUPPORT if SPL 1654 select SPL_OF_CONTROL if SPL 1655 select SPL_PINCTRL if SPL 1656 select SUPPORT_SPL 1657 imply CMD_DM 1658 imply DISTRO_DEFAULTS 1659 imply FAT_WRITE 1660 help 1661 Support for UniPhier SoC family developed by Socionext Inc. 1662 (formerly, System LSI Business Division of Panasonic Corporation) 1663 1664config ARCH_STM32 1665 bool "Support STMicroelectronics STM32 MCU with cortex M" 1666 select CPU_V7M 1667 select DM 1668 select DM_SERIAL 1669 imply CMD_DM 1670 1671config ARCH_STI 1672 bool "Support STMicrolectronics SoCs" 1673 select BLK 1674 select CPU_V7A 1675 select DM 1676 select DM_MMC 1677 select DM_RESET 1678 select DM_SERIAL 1679 imply CMD_DM 1680 help 1681 Support for STMicroelectronics STiH407/10 SoC family. 1682 This SoC is used on Linaro 96Board STiH410-B2260 1683 1684config ARCH_STM32MP 1685 bool "Support STMicroelectronics STM32MP Socs with cortex A" 1686 select ARCH_MISC_INIT 1687 select ARCH_SUPPORT_TFABOOT 1688 select BOARD_LATE_INIT 1689 select CLK 1690 select DM 1691 select DM_GPIO 1692 select DM_RESET 1693 select DM_SERIAL 1694 select MISC 1695 select OF_CONTROL 1696 select OF_LIBFDT 1697 select OF_SYSTEM_SETUP 1698 select PINCTRL 1699 select REGMAP 1700 select SUPPORT_SPL 1701 select SYSCON 1702 select SYSRESET 1703 select SYS_THUMB_BUILD 1704 imply SPL_SYSRESET 1705 imply CMD_DM 1706 imply CMD_POWEROFF 1707 imply OF_LIBFDT_OVERLAY 1708 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1709 imply USE_PREBOOT 1710 help 1711 Support for STM32MP SoC family developed by STMicroelectronics, 1712 MPUs based on ARM cortex A core 1713 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL). 1714 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot 1715 chain. 1716 SPL is the unsecure FSBL for the basic boot chain. 1717 1718config ARCH_ROCKCHIP 1719 bool "Support Rockchip SoCs" 1720 select BLK 1721 select BINMAN if SPL_OPTEE 1722 select DM 1723 select DM_GPIO 1724 select DM_I2C 1725 select DM_MMC 1726 select DM_PWM 1727 select DM_REGULATOR 1728 select DM_SERIAL 1729 select DM_SPI 1730 select DM_SPI_FLASH 1731 select DM_USB if USB 1732 select ENABLE_ARM_SOC_BOOT0_HOOK 1733 select OF_CONTROL 1734 select SPI 1735 select SPL_DM if SPL 1736 select SPL_DM_SPI if SPL 1737 select SPL_DM_SPI_FLASH if SPL 1738 select SYS_MALLOC_F 1739 select SYS_THUMB_BUILD if !ARM64 1740 imply ADC 1741 imply CMD_DM 1742 imply DEBUG_UART_BOARD_INIT 1743 imply DISTRO_DEFAULTS 1744 imply FAT_WRITE 1745 imply SARADC_ROCKCHIP 1746 imply SPL_SYSRESET 1747 imply SPL_SYS_MALLOC_SIMPLE 1748 imply SYS_NS16550 1749 imply TPL_SYSRESET 1750 imply USB_FUNCTION_FASTBOOT 1751 1752config ARCH_OCTEONTX 1753 bool "Support OcteonTX SoCs" 1754 select CLK 1755 select DM 1756 select ARM64 1757 select OF_CONTROL 1758 select OF_LIVE 1759 select BOARD_LATE_INIT 1760 select SYS_CACHE_SHIFT_7 1761 1762config ARCH_OCTEONTX2 1763 bool "Support OcteonTX2 SoCs" 1764 select CLK 1765 select DM 1766 select ARM64 1767 select OF_CONTROL 1768 select OF_LIVE 1769 select BOARD_LATE_INIT 1770 select SYS_CACHE_SHIFT_7 1771 1772config TARGET_THUNDERX_88XX 1773 bool "Support ThunderX 88xx" 1774 select ARM64 1775 select OF_CONTROL 1776 select PL01X_SERIAL 1777 select SYS_CACHE_SHIFT_7 1778 1779config ARCH_ASPEED 1780 bool "Support Aspeed SoCs" 1781 select DM 1782 select OF_CONTROL 1783 imply CMD_DM 1784 1785config TARGET_DURIAN 1786 bool "Support Phytium Durian Platform" 1787 select ARM64 1788 help 1789 Support for durian platform. 1790 It has 2GB Sdram, uart and pcie. 1791 1792config TARGET_PRESIDIO_ASIC 1793 bool "Support Cortina Presidio ASIC Platform" 1794 select ARM64 1795 1796config TARGET_XENGUEST_ARM64 1797 bool "Xen guest ARM64" 1798 select ARM64 1799 select XEN 1800 select OF_CONTROL 1801 select LINUX_KERNEL_IMAGE_HEADER 1802 select XEN_SERIAL 1803 select SSCANF 1804endchoice 1805 1806config ARCH_SUPPORT_TFABOOT 1807 bool 1808 1809config TFABOOT 1810 bool "Support for booting from TF-A" 1811 depends on ARCH_SUPPORT_TFABOOT 1812 default n 1813 help 1814 Some platforms support the setup of secure registers (for instance 1815 for CPU errata handling) or provide secure services like PSCI. 1816 Those services could also be provided by other firmware parts 1817 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot 1818 does not need to (and cannot) execute this code. 1819 Enabling this option will make a U-Boot binary that is relying 1820 on other firmware layers to provide secure functionality. 1821 1822config TI_SECURE_DEVICE 1823 bool "HS Device Type Support" 1824 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3 1825 help 1826 If a high secure (HS) device type is being used, this config 1827 must be set. This option impacts various aspects of the 1828 build system (to create signed boot images that can be 1829 authenticated) and the code. See the doc/README.ti-secure 1830 file for further details. 1831 1832if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE 1833config ISW_ENTRY_ADDR 1834 hex "Address in memory or XIP address of bootloader entry point" 1835 default 0x402F4000 if AM43XX 1836 default 0x402F0400 if AM33XX 1837 default 0x40301350 if OMAP54XX 1838 help 1839 After any reset, the boot ROM searches the boot media for a valid 1840 boot image. For non-XIP devices, the ROM then copies the image into 1841 internal memory. For all boot modes, after the ROM processes the 1842 boot image it eventually computes the entry point address depending 1843 on the device type (secure/non-secure), boot media (xip/non-xip) and 1844 image headers. 1845endif 1846 1847source "arch/arm/mach-aspeed/Kconfig" 1848 1849source "arch/arm/mach-at91/Kconfig" 1850 1851source "arch/arm/mach-bcm283x/Kconfig" 1852 1853source "arch/arm/mach-bcmstb/Kconfig" 1854 1855source "arch/arm/mach-davinci/Kconfig" 1856 1857source "arch/arm/mach-exynos/Kconfig" 1858 1859source "arch/arm/mach-highbank/Kconfig" 1860 1861source "arch/arm/mach-integrator/Kconfig" 1862 1863source "arch/arm/mach-ipq40xx/Kconfig" 1864 1865source "arch/arm/mach-k3/Kconfig" 1866 1867source "arch/arm/mach-keystone/Kconfig" 1868 1869source "arch/arm/mach-kirkwood/Kconfig" 1870 1871source "arch/arm/mach-lpc32xx/Kconfig" 1872 1873source "arch/arm/mach-mvebu/Kconfig" 1874 1875source "arch/arm/mach-octeontx/Kconfig" 1876 1877source "arch/arm/mach-octeontx2/Kconfig" 1878 1879source "arch/arm/cpu/armv7/ls102xa/Kconfig" 1880 1881source "arch/arm/mach-imx/mx2/Kconfig" 1882 1883source "arch/arm/mach-imx/mx3/Kconfig" 1884 1885source "arch/arm/mach-imx/mx5/Kconfig" 1886 1887source "arch/arm/mach-imx/mx6/Kconfig" 1888 1889source "arch/arm/mach-imx/mx7/Kconfig" 1890 1891source "arch/arm/mach-imx/mx7ulp/Kconfig" 1892 1893source "arch/arm/mach-imx/imx8/Kconfig" 1894 1895source "arch/arm/mach-imx/imx8m/Kconfig" 1896 1897source "arch/arm/mach-imx/imxrt/Kconfig" 1898 1899source "arch/arm/mach-imx/mxs/Kconfig" 1900 1901source "arch/arm/mach-omap2/Kconfig" 1902 1903source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig" 1904 1905source "arch/arm/mach-orion5x/Kconfig" 1906 1907source "arch/arm/mach-owl/Kconfig" 1908 1909source "arch/arm/mach-rmobile/Kconfig" 1910 1911source "arch/arm/mach-meson/Kconfig" 1912 1913source "arch/arm/mach-mediatek/Kconfig" 1914 1915source "arch/arm/mach-qemu/Kconfig" 1916 1917source "arch/arm/mach-rockchip/Kconfig" 1918 1919source "arch/arm/mach-s5pc1xx/Kconfig" 1920 1921source "arch/arm/mach-snapdragon/Kconfig" 1922 1923source "arch/arm/mach-socfpga/Kconfig" 1924 1925source "arch/arm/mach-sti/Kconfig" 1926 1927source "arch/arm/mach-stm32/Kconfig" 1928 1929source "arch/arm/mach-stm32mp/Kconfig" 1930 1931source "arch/arm/mach-sunxi/Kconfig" 1932 1933source "arch/arm/mach-tegra/Kconfig" 1934 1935source "arch/arm/mach-u8500/Kconfig" 1936 1937source "arch/arm/mach-uniphier/Kconfig" 1938 1939source "arch/arm/cpu/armv7/vf610/Kconfig" 1940 1941source "arch/arm/mach-zynq/Kconfig" 1942 1943source "arch/arm/mach-zynqmp/Kconfig" 1944 1945source "arch/arm/mach-versal/Kconfig" 1946 1947source "arch/arm/mach-zynqmp-r5/Kconfig" 1948 1949source "arch/arm/cpu/armv7/Kconfig" 1950 1951source "arch/arm/cpu/armv8/Kconfig" 1952 1953source "arch/arm/mach-imx/Kconfig" 1954 1955source "arch/arm/mach-nexell/Kconfig" 1956 1957source "board/armltd/total_compute/Kconfig" 1958 1959source "board/bosch/shc/Kconfig" 1960source "board/bosch/guardian/Kconfig" 1961source "board/CarMediaLab/flea3/Kconfig" 1962source "board/Marvell/aspenite/Kconfig" 1963source "board/Marvell/gplugd/Kconfig" 1964source "board/Marvell/octeontx/Kconfig" 1965source "board/Marvell/octeontx2/Kconfig" 1966source "board/armadeus/apf27/Kconfig" 1967source "board/armltd/vexpress/Kconfig" 1968source "board/armltd/vexpress64/Kconfig" 1969source "board/cortina/presidio-asic/Kconfig" 1970source "board/broadcom/bcm23550_w1d/Kconfig" 1971source "board/broadcom/bcm28155_ap/Kconfig" 1972source "board/broadcom/bcm963158/Kconfig" 1973source "board/broadcom/bcm968360bg/Kconfig" 1974source "board/broadcom/bcm968580xref/Kconfig" 1975source "board/broadcom/bcmcygnus/Kconfig" 1976source "board/broadcom/bcmnsp/Kconfig" 1977source "board/broadcom/bcmns2/Kconfig" 1978source "board/broadcom/bcmns3/Kconfig" 1979source "board/cavium/thunderx/Kconfig" 1980source "board/cirrus/edb93xx/Kconfig" 1981source "board/eets/pdu001/Kconfig" 1982source "board/emulation/qemu-arm/Kconfig" 1983source "board/freescale/ls2080aqds/Kconfig" 1984source "board/freescale/ls2080ardb/Kconfig" 1985source "board/freescale/ls1088a/Kconfig" 1986source "board/freescale/ls1028a/Kconfig" 1987source "board/freescale/ls1021aqds/Kconfig" 1988source "board/freescale/ls1043aqds/Kconfig" 1989source "board/freescale/ls1021atwr/Kconfig" 1990source "board/freescale/ls1021atsn/Kconfig" 1991source "board/freescale/ls1021aiot/Kconfig" 1992source "board/freescale/ls1046aqds/Kconfig" 1993source "board/freescale/ls1043ardb/Kconfig" 1994source "board/freescale/ls1046ardb/Kconfig" 1995source "board/freescale/ls1046afrwy/Kconfig" 1996source "board/freescale/ls1012aqds/Kconfig" 1997source "board/freescale/ls1012ardb/Kconfig" 1998source "board/freescale/ls1012afrdm/Kconfig" 1999source "board/freescale/lx2160a/Kconfig" 2000source "board/freescale/s32v234evb/Kconfig" 2001source "board/grinn/chiliboard/Kconfig" 2002source "board/hisilicon/hikey/Kconfig" 2003source "board/hisilicon/hikey960/Kconfig" 2004source "board/hisilicon/poplar/Kconfig" 2005source "board/isee/igep003x/Kconfig" 2006source "board/kontron/sl28/Kconfig" 2007source "board/myir/mys_6ulx/Kconfig" 2008source "board/spear/spear300/Kconfig" 2009source "board/spear/spear310/Kconfig" 2010source "board/spear/spear320/Kconfig" 2011source "board/spear/spear600/Kconfig" 2012source "board/spear/x600/Kconfig" 2013source "board/st/stv0991/Kconfig" 2014source "board/tcl/sl50/Kconfig" 2015source "board/toradex/colibri_pxa270/Kconfig" 2016source "board/variscite/dart_6ul/Kconfig" 2017source "board/vscom/baltos/Kconfig" 2018source "board/phytium/durian/Kconfig" 2019source "board/xen/xenguest_arm64/Kconfig" 2020 2021source "arch/arm/Kconfig.debug" 2022 2023endmenu 2024 2025config SPL_LDSCRIPT 2026 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK 2027 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136 2028 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64 2029