1# SPDX-License-Identifier: GPL-2.0
2config MIPS
3	bool
4	default y
5	select ARCH_32BIT_OFF_T if !64BIT
6	select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7	select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
8	select ARCH_HAS_FORTIFY_SOURCE
9	select ARCH_HAS_KCOV
10	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
11	select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
12	select ARCH_HAS_STRNCPY_FROM_USER
13	select ARCH_HAS_STRNLEN_USER
14	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
15	select ARCH_HAS_UBSAN_SANITIZE_ALL
16	select ARCH_HAS_GCOV_PROFILE_ALL
17	select ARCH_KEEP_MEMBLOCK
18	select ARCH_SUPPORTS_UPROBES
19	select ARCH_USE_BUILTIN_BSWAP
20	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
21	select ARCH_USE_MEMTEST
22	select ARCH_USE_QUEUED_RWLOCKS
23	select ARCH_USE_QUEUED_SPINLOCKS
24	select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
25	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
26	select ARCH_WANT_IPC_PARSE_VERSION
27	select ARCH_WANT_LD_ORPHAN_WARN
28	select BUILDTIME_TABLE_SORT
29	select CLONE_BACKWARDS
30	select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
31	select CPU_PM if CPU_IDLE
32	select GENERIC_ATOMIC64 if !64BIT
33	select GENERIC_CMOS_UPDATE
34	select GENERIC_CPU_AUTOPROBE
35	select GENERIC_FIND_FIRST_BIT
36	select GENERIC_GETTIMEOFDAY
37	select GENERIC_IOMAP
38	select GENERIC_IRQ_PROBE
39	select GENERIC_IRQ_SHOW
40	select GENERIC_ISA_DMA if EISA
41	select GENERIC_LIB_ASHLDI3
42	select GENERIC_LIB_ASHRDI3
43	select GENERIC_LIB_CMPDI2
44	select GENERIC_LIB_LSHRDI3
45	select GENERIC_LIB_UCMPDI2
46	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
47	select GENERIC_SMP_IDLE_THREAD
48	select GENERIC_TIME_VSYSCALL
49	select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
50	select HAVE_ARCH_COMPILER_H
51	select HAVE_ARCH_JUMP_LABEL
52	select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
53	select HAVE_ARCH_MMAP_RND_BITS if MMU
54	select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
55	select HAVE_ARCH_SECCOMP_FILTER
56	select HAVE_ARCH_TRACEHOOK
57	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
58	select HAVE_ASM_MODVERSIONS
59	select HAVE_CONTEXT_TRACKING
60	select HAVE_TIF_NOHZ
61	select HAVE_C_RECORDMCOUNT
62	select HAVE_DEBUG_KMEMLEAK
63	select HAVE_DEBUG_STACKOVERFLOW
64	select HAVE_DMA_CONTIGUOUS
65	select HAVE_DYNAMIC_FTRACE
66	select HAVE_EBPF_JIT if !CPU_MICROMIPS && \
67				!CPU_DADDI_WORKAROUNDS && \
68				!CPU_R4000_WORKAROUNDS && \
69				!CPU_R4400_WORKAROUNDS
70	select HAVE_EXIT_THREAD
71	select HAVE_FAST_GUP
72	select HAVE_FTRACE_MCOUNT_RECORD
73	select HAVE_FUNCTION_GRAPH_TRACER
74	select HAVE_FUNCTION_TRACER
75	select HAVE_GCC_PLUGINS
76	select HAVE_GENERIC_VDSO
77	select HAVE_IOREMAP_PROT
78	select HAVE_IRQ_EXIT_ON_IRQ_STACK
79	select HAVE_IRQ_TIME_ACCOUNTING
80	select HAVE_KPROBES
81	select HAVE_KRETPROBES
82	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
83	select HAVE_MOD_ARCH_SPECIFIC
84	select HAVE_NMI
85	select HAVE_PERF_EVENTS
86	select HAVE_PERF_REGS
87	select HAVE_PERF_USER_STACK_DUMP
88	select HAVE_REGS_AND_STACK_ACCESS_API
89	select HAVE_RSEQ
90	select HAVE_SPARSE_SYSCALL_NR
91	select HAVE_STACKPROTECTOR
92	select HAVE_SYSCALL_TRACEPOINTS
93	select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
94	select IRQ_FORCED_THREADING
95	select ISA if EISA
96	select MODULES_USE_ELF_REL if MODULES
97	select MODULES_USE_ELF_RELA if MODULES && 64BIT
98	select PERF_USE_VMALLOC
99	select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
100	select RTC_LIB
101	select SYSCTL_EXCEPTION_TRACE
102	select TRACE_IRQFLAGS_SUPPORT
103	select VIRT_TO_BUS
104	select ARCH_HAS_ELFCORE_COMPAT
105
106config MIPS_FIXUP_BIGPHYS_ADDR
107	bool
108
109config MIPS_GENERIC
110	bool
111
112config MACH_INGENIC
113	bool
114	select SYS_SUPPORTS_32BIT_KERNEL
115	select SYS_SUPPORTS_LITTLE_ENDIAN
116	select SYS_SUPPORTS_ZBOOT
117	select DMA_NONCOHERENT
118	select ARCH_HAS_SYNC_DMA_FOR_CPU
119	select IRQ_MIPS_CPU
120	select PINCTRL
121	select GPIOLIB
122	select COMMON_CLK
123	select GENERIC_IRQ_CHIP
124	select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
125	select USE_OF
126	select CPU_SUPPORTS_CPUFREQ
127	select MIPS_EXTERNAL_TIMER
128
129menu "Machine selection"
130
131choice
132	prompt "System type"
133	default MIPS_GENERIC_KERNEL
134
135config MIPS_GENERIC_KERNEL
136	bool "Generic board-agnostic MIPS kernel"
137	select ARCH_HAS_SETUP_DMA_OPS
138	select MIPS_GENERIC
139	select BOOT_RAW
140	select BUILTIN_DTB
141	select CEVT_R4K
142	select CLKSRC_MIPS_GIC
143	select COMMON_CLK
144	select CPU_MIPSR2_IRQ_EI
145	select CPU_MIPSR2_IRQ_VI
146	select CSRC_R4K
147	select DMA_NONCOHERENT
148	select HAVE_PCI
149	select IRQ_MIPS_CPU
150	select MIPS_AUTO_PFN_OFFSET
151	select MIPS_CPU_SCACHE
152	select MIPS_GIC
153	select MIPS_L1_CACHE_SHIFT_7
154	select NO_EXCEPT_FILL
155	select PCI_DRIVERS_GENERIC
156	select SMP_UP if SMP
157	select SWAP_IO_SPACE
158	select SYS_HAS_CPU_MIPS32_R1
159	select SYS_HAS_CPU_MIPS32_R2
160	select SYS_HAS_CPU_MIPS32_R6
161	select SYS_HAS_CPU_MIPS64_R1
162	select SYS_HAS_CPU_MIPS64_R2
163	select SYS_HAS_CPU_MIPS64_R6
164	select SYS_SUPPORTS_32BIT_KERNEL
165	select SYS_SUPPORTS_64BIT_KERNEL
166	select SYS_SUPPORTS_BIG_ENDIAN
167	select SYS_SUPPORTS_HIGHMEM
168	select SYS_SUPPORTS_LITTLE_ENDIAN
169	select SYS_SUPPORTS_MICROMIPS
170	select SYS_SUPPORTS_MIPS16
171	select SYS_SUPPORTS_MIPS_CPS
172	select SYS_SUPPORTS_MULTITHREADING
173	select SYS_SUPPORTS_RELOCATABLE
174	select SYS_SUPPORTS_SMARTMIPS
175	select SYS_SUPPORTS_ZBOOT
176	select UHI_BOOT
177	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
178	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
179	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
180	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
181	select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
182	select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
183	select USE_OF
184	help
185	  Select this to build a kernel which aims to support multiple boards,
186	  generally using a flattened device tree passed from the bootloader
187	  using the boot protocol defined in the UHI (Unified Hosting
188	  Interface) specification.
189
190config MIPS_ALCHEMY
191	bool "Alchemy processor based machines"
192	select PHYS_ADDR_T_64BIT
193	select CEVT_R4K
194	select CSRC_R4K
195	select IRQ_MIPS_CPU
196	select DMA_NONCOHERENT		# Au1000,1500,1100 aren't, rest is
197	select MIPS_FIXUP_BIGPHYS_ADDR if PCI
198	select SYS_HAS_CPU_MIPS32_R1
199	select SYS_SUPPORTS_32BIT_KERNEL
200	select SYS_SUPPORTS_APM_EMULATION
201	select GPIOLIB
202	select SYS_SUPPORTS_ZBOOT
203	select COMMON_CLK
204
205config AR7
206	bool "Texas Instruments AR7"
207	select BOOT_ELF32
208	select COMMON_CLK
209	select DMA_NONCOHERENT
210	select CEVT_R4K
211	select CSRC_R4K
212	select IRQ_MIPS_CPU
213	select NO_EXCEPT_FILL
214	select SWAP_IO_SPACE
215	select SYS_HAS_CPU_MIPS32_R1
216	select SYS_HAS_EARLY_PRINTK
217	select SYS_SUPPORTS_32BIT_KERNEL
218	select SYS_SUPPORTS_LITTLE_ENDIAN
219	select SYS_SUPPORTS_MIPS16
220	select SYS_SUPPORTS_ZBOOT_UART16550
221	select GPIOLIB
222	select VLYNQ
223	help
224	  Support for the Texas Instruments AR7 System-on-a-Chip
225	  family: TNETD7100, 7200 and 7300.
226
227config ATH25
228	bool "Atheros AR231x/AR531x SoC support"
229	select CEVT_R4K
230	select CSRC_R4K
231	select DMA_NONCOHERENT
232	select IRQ_MIPS_CPU
233	select IRQ_DOMAIN
234	select SYS_HAS_CPU_MIPS32_R1
235	select SYS_SUPPORTS_BIG_ENDIAN
236	select SYS_SUPPORTS_32BIT_KERNEL
237	select SYS_HAS_EARLY_PRINTK
238	help
239	  Support for Atheros AR231x and Atheros AR531x based boards
240
241config ATH79
242	bool "Atheros AR71XX/AR724X/AR913X based boards"
243	select ARCH_HAS_RESET_CONTROLLER
244	select BOOT_RAW
245	select CEVT_R4K
246	select CSRC_R4K
247	select DMA_NONCOHERENT
248	select GPIOLIB
249	select PINCTRL
250	select COMMON_CLK
251	select IRQ_MIPS_CPU
252	select SYS_HAS_CPU_MIPS32_R2
253	select SYS_HAS_EARLY_PRINTK
254	select SYS_SUPPORTS_32BIT_KERNEL
255	select SYS_SUPPORTS_BIG_ENDIAN
256	select SYS_SUPPORTS_MIPS16
257	select SYS_SUPPORTS_ZBOOT_UART_PROM
258	select USE_OF
259	select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
260	help
261	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
262
263config BMIPS_GENERIC
264	bool "Broadcom Generic BMIPS kernel"
265	select ARCH_HAS_RESET_CONTROLLER
266	select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
267	select ARCH_HAS_PHYS_TO_DMA
268	select BOOT_RAW
269	select NO_EXCEPT_FILL
270	select USE_OF
271	select CEVT_R4K
272	select CSRC_R4K
273	select SYNC_R4K
274	select COMMON_CLK
275	select BCM6345_L1_IRQ
276	select BCM7038_L1_IRQ
277	select BCM7120_L2_IRQ
278	select BRCMSTB_L2_IRQ
279	select IRQ_MIPS_CPU
280	select DMA_NONCOHERENT
281	select SYS_SUPPORTS_32BIT_KERNEL
282	select SYS_SUPPORTS_LITTLE_ENDIAN
283	select SYS_SUPPORTS_BIG_ENDIAN
284	select SYS_SUPPORTS_HIGHMEM
285	select SYS_HAS_CPU_BMIPS32_3300
286	select SYS_HAS_CPU_BMIPS4350
287	select SYS_HAS_CPU_BMIPS4380
288	select SYS_HAS_CPU_BMIPS5000
289	select SWAP_IO_SPACE
290	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
291	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
292	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
293	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
294	select HARDIRQS_SW_RESEND
295	select HAVE_PCI
296	select PCI_DRIVERS_GENERIC
297	help
298	  Build a generic DT-based kernel image that boots on select
299	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
300	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
301	  must be set appropriately for your board.
302
303config BCM47XX
304	bool "Broadcom BCM47XX based boards"
305	select BOOT_RAW
306	select CEVT_R4K
307	select CSRC_R4K
308	select DMA_NONCOHERENT
309	select HAVE_PCI
310	select IRQ_MIPS_CPU
311	select SYS_HAS_CPU_MIPS32_R1
312	select NO_EXCEPT_FILL
313	select SYS_SUPPORTS_32BIT_KERNEL
314	select SYS_SUPPORTS_LITTLE_ENDIAN
315	select SYS_SUPPORTS_MIPS16
316	select SYS_SUPPORTS_ZBOOT
317	select SYS_HAS_EARLY_PRINTK
318	select USE_GENERIC_EARLY_PRINTK_8250
319	select GPIOLIB
320	select LEDS_GPIO_REGISTER
321	select BCM47XX_NVRAM
322	select BCM47XX_SPROM
323	select BCM47XX_SSB if !BCM47XX_BCMA
324	help
325	  Support for BCM47XX based boards
326
327config BCM63XX
328	bool "Broadcom BCM63XX based boards"
329	select BOOT_RAW
330	select CEVT_R4K
331	select CSRC_R4K
332	select SYNC_R4K
333	select DMA_NONCOHERENT
334	select IRQ_MIPS_CPU
335	select SYS_SUPPORTS_32BIT_KERNEL
336	select SYS_SUPPORTS_BIG_ENDIAN
337	select SYS_HAS_EARLY_PRINTK
338	select SYS_HAS_CPU_BMIPS32_3300
339	select SYS_HAS_CPU_BMIPS4350
340	select SYS_HAS_CPU_BMIPS4380
341	select SWAP_IO_SPACE
342	select GPIOLIB
343	select MIPS_L1_CACHE_SHIFT_4
344	select HAVE_LEGACY_CLK
345	help
346	  Support for BCM63XX based boards
347
348config MIPS_COBALT
349	bool "Cobalt Server"
350	select CEVT_R4K
351	select CSRC_R4K
352	select CEVT_GT641XX
353	select DMA_NONCOHERENT
354	select FORCE_PCI
355	select I8253
356	select I8259
357	select IRQ_MIPS_CPU
358	select IRQ_GT641XX
359	select PCI_GT64XXX_PCI0
360	select SYS_HAS_CPU_NEVADA
361	select SYS_HAS_EARLY_PRINTK
362	select SYS_SUPPORTS_32BIT_KERNEL
363	select SYS_SUPPORTS_64BIT_KERNEL
364	select SYS_SUPPORTS_LITTLE_ENDIAN
365	select USE_GENERIC_EARLY_PRINTK_8250
366
367config MACH_DECSTATION
368	bool "DECstations"
369	select BOOT_ELF32
370	select CEVT_DS1287
371	select CEVT_R4K if CPU_R4X00
372	select CSRC_IOASIC
373	select CSRC_R4K if CPU_R4X00
374	select CPU_DADDI_WORKAROUNDS if 64BIT
375	select CPU_R4000_WORKAROUNDS if 64BIT
376	select CPU_R4400_WORKAROUNDS if 64BIT
377	select DMA_NONCOHERENT
378	select NO_IOPORT_MAP
379	select IRQ_MIPS_CPU
380	select SYS_HAS_CPU_R3000
381	select SYS_HAS_CPU_R4X00
382	select SYS_SUPPORTS_32BIT_KERNEL
383	select SYS_SUPPORTS_64BIT_KERNEL
384	select SYS_SUPPORTS_LITTLE_ENDIAN
385	select SYS_SUPPORTS_128HZ
386	select SYS_SUPPORTS_256HZ
387	select SYS_SUPPORTS_1024HZ
388	select MIPS_L1_CACHE_SHIFT_4
389	help
390	  This enables support for DEC's MIPS based workstations.  For details
391	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
392	  DECstation porting pages on <http://decstation.unix-ag.org/>.
393
394	  If you have one of the following DECstation Models you definitely
395	  want to choose R4xx0 for the CPU Type:
396
397		DECstation 5000/50
398		DECstation 5000/150
399		DECstation 5000/260
400		DECsystem 5900/260
401
402	  otherwise choose R3000.
403
404config MACH_JAZZ
405	bool "Jazz family of machines"
406	select ARC_MEMORY
407	select ARC_PROMLIB
408	select ARCH_MIGHT_HAVE_PC_PARPORT
409	select ARCH_MIGHT_HAVE_PC_SERIO
410	select DMA_OPS
411	select FW_ARC
412	select FW_ARC32
413	select ARCH_MAY_HAVE_PC_FDC
414	select CEVT_R4K
415	select CSRC_R4K
416	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
417	select GENERIC_ISA_DMA
418	select HAVE_PCSPKR_PLATFORM
419	select IRQ_MIPS_CPU
420	select I8253
421	select I8259
422	select ISA
423	select SYS_HAS_CPU_R4X00
424	select SYS_SUPPORTS_32BIT_KERNEL
425	select SYS_SUPPORTS_64BIT_KERNEL
426	select SYS_SUPPORTS_100HZ
427	select SYS_SUPPORTS_LITTLE_ENDIAN
428	help
429	  This a family of machines based on the MIPS R4030 chipset which was
430	  used by several vendors to build RISC/os and Windows NT workstations.
431	  Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
432	  Olivetti M700-10 workstations.
433
434config MACH_INGENIC_SOC
435	bool "Ingenic SoC based machines"
436	select MIPS_GENERIC
437	select MACH_INGENIC
438	select SYS_SUPPORTS_ZBOOT_UART16550
439	select CPU_SUPPORTS_CPUFREQ
440	select MIPS_EXTERNAL_TIMER
441
442config LANTIQ
443	bool "Lantiq based platforms"
444	select DMA_NONCOHERENT
445	select IRQ_MIPS_CPU
446	select CEVT_R4K
447	select CSRC_R4K
448	select SYS_HAS_CPU_MIPS32_R1
449	select SYS_HAS_CPU_MIPS32_R2
450	select SYS_SUPPORTS_BIG_ENDIAN
451	select SYS_SUPPORTS_32BIT_KERNEL
452	select SYS_SUPPORTS_MIPS16
453	select SYS_SUPPORTS_MULTITHREADING
454	select SYS_SUPPORTS_VPE_LOADER
455	select SYS_HAS_EARLY_PRINTK
456	select GPIOLIB
457	select SWAP_IO_SPACE
458	select BOOT_RAW
459	select HAVE_LEGACY_CLK
460	select USE_OF
461	select PINCTRL
462	select PINCTRL_LANTIQ
463	select ARCH_HAS_RESET_CONTROLLER
464	select RESET_CONTROLLER
465
466config MACH_LOONGSON32
467	bool "Loongson 32-bit family of machines"
468	select SYS_SUPPORTS_ZBOOT
469	help
470	  This enables support for the Loongson-1 family of machines.
471
472	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
473	  the Institute of Computing Technology (ICT), Chinese Academy of
474	  Sciences (CAS).
475
476config MACH_LOONGSON2EF
477	bool "Loongson-2E/F family of machines"
478	select SYS_SUPPORTS_ZBOOT
479	help
480	  This enables the support of early Loongson-2E/F family of machines.
481
482config MACH_LOONGSON64
483	bool "Loongson 64-bit family of machines"
484	select ARCH_SPARSEMEM_ENABLE
485	select ARCH_MIGHT_HAVE_PC_PARPORT
486	select ARCH_MIGHT_HAVE_PC_SERIO
487	select GENERIC_ISA_DMA_SUPPORT_BROKEN
488	select BOOT_ELF32
489	select BOARD_SCACHE
490	select CSRC_R4K
491	select CEVT_R4K
492	select CPU_HAS_WB
493	select FORCE_PCI
494	select ISA
495	select I8259
496	select IRQ_MIPS_CPU
497	select NO_EXCEPT_FILL
498	select NR_CPUS_DEFAULT_64
499	select USE_GENERIC_EARLY_PRINTK_8250
500	select PCI_DRIVERS_GENERIC
501	select SYS_HAS_CPU_LOONGSON64
502	select SYS_HAS_EARLY_PRINTK
503	select SYS_SUPPORTS_SMP
504	select SYS_SUPPORTS_HOTPLUG_CPU
505	select SYS_SUPPORTS_NUMA
506	select SYS_SUPPORTS_64BIT_KERNEL
507	select SYS_SUPPORTS_HIGHMEM
508	select SYS_SUPPORTS_LITTLE_ENDIAN
509	select SYS_SUPPORTS_ZBOOT
510	select SYS_SUPPORTS_RELOCATABLE
511	select ZONE_DMA32
512	select COMMON_CLK
513	select USE_OF
514	select BUILTIN_DTB
515	select PCI_HOST_GENERIC
516	help
517	  This enables the support of Loongson-2/3 family of machines.
518
519	  Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
520	  GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
521	  and Loongson-2F which will be removed), developed by the Institute
522	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
523
524config MIPS_MALTA
525	bool "MIPS Malta board"
526	select ARCH_MAY_HAVE_PC_FDC
527	select ARCH_MIGHT_HAVE_PC_PARPORT
528	select ARCH_MIGHT_HAVE_PC_SERIO
529	select BOOT_ELF32
530	select BOOT_RAW
531	select BUILTIN_DTB
532	select CEVT_R4K
533	select CLKSRC_MIPS_GIC
534	select COMMON_CLK
535	select CSRC_R4K
536	select DMA_NONCOHERENT
537	select GENERIC_ISA_DMA
538	select HAVE_PCSPKR_PLATFORM
539	select HAVE_PCI
540	select I8253
541	select I8259
542	select IRQ_MIPS_CPU
543	select MIPS_BONITO64
544	select MIPS_CPU_SCACHE
545	select MIPS_GIC
546	select MIPS_L1_CACHE_SHIFT_6
547	select MIPS_MSC
548	select PCI_GT64XXX_PCI0
549	select SMP_UP if SMP
550	select SWAP_IO_SPACE
551	select SYS_HAS_CPU_MIPS32_R1
552	select SYS_HAS_CPU_MIPS32_R2
553	select SYS_HAS_CPU_MIPS32_R3_5
554	select SYS_HAS_CPU_MIPS32_R5
555	select SYS_HAS_CPU_MIPS32_R6
556	select SYS_HAS_CPU_MIPS64_R1
557	select SYS_HAS_CPU_MIPS64_R2
558	select SYS_HAS_CPU_MIPS64_R6
559	select SYS_HAS_CPU_NEVADA
560	select SYS_HAS_CPU_RM7000
561	select SYS_SUPPORTS_32BIT_KERNEL
562	select SYS_SUPPORTS_64BIT_KERNEL
563	select SYS_SUPPORTS_BIG_ENDIAN
564	select SYS_SUPPORTS_HIGHMEM
565	select SYS_SUPPORTS_LITTLE_ENDIAN
566	select SYS_SUPPORTS_MICROMIPS
567	select SYS_SUPPORTS_MIPS16
568	select SYS_SUPPORTS_MIPS_CMP
569	select SYS_SUPPORTS_MIPS_CPS
570	select SYS_SUPPORTS_MULTITHREADING
571	select SYS_SUPPORTS_RELOCATABLE
572	select SYS_SUPPORTS_SMARTMIPS
573	select SYS_SUPPORTS_VPE_LOADER
574	select SYS_SUPPORTS_ZBOOT
575	select USE_OF
576	select WAR_ICACHE_REFILLS
577	select ZONE_DMA32 if 64BIT
578	help
579	  This enables support for the MIPS Technologies Malta evaluation
580	  board.
581
582config MACH_PIC32
583	bool "Microchip PIC32 Family"
584	help
585	  This enables support for the Microchip PIC32 family of platforms.
586
587	  Microchip PIC32 is a family of general-purpose 32 bit MIPS core
588	  microcontrollers.
589
590config MACH_VR41XX
591	bool "NEC VR4100 series based machines"
592	select CEVT_R4K
593	select CSRC_R4K
594	select SYS_HAS_CPU_VR41XX
595	select SYS_SUPPORTS_MIPS16
596	select GPIOLIB
597
598config MACH_NINTENDO64
599	bool "Nintendo 64 console"
600	select CEVT_R4K
601	select CSRC_R4K
602	select SYS_HAS_CPU_R4300
603	select SYS_SUPPORTS_BIG_ENDIAN
604	select SYS_SUPPORTS_ZBOOT
605	select SYS_SUPPORTS_32BIT_KERNEL
606	select SYS_SUPPORTS_64BIT_KERNEL
607	select DMA_NONCOHERENT
608	select IRQ_MIPS_CPU
609
610config RALINK
611	bool "Ralink based machines"
612	select CEVT_R4K
613	select COMMON_CLK
614	select CSRC_R4K
615	select BOOT_RAW
616	select DMA_NONCOHERENT
617	select IRQ_MIPS_CPU
618	select USE_OF
619	select SYS_HAS_CPU_MIPS32_R1
620	select SYS_HAS_CPU_MIPS32_R2
621	select SYS_SUPPORTS_32BIT_KERNEL
622	select SYS_SUPPORTS_LITTLE_ENDIAN
623	select SYS_SUPPORTS_MIPS16
624	select SYS_SUPPORTS_ZBOOT
625	select SYS_HAS_EARLY_PRINTK
626	select ARCH_HAS_RESET_CONTROLLER
627	select RESET_CONTROLLER
628
629config MACH_REALTEK_RTL
630	bool "Realtek RTL838x/RTL839x based machines"
631	select MIPS_GENERIC
632	select DMA_NONCOHERENT
633	select IRQ_MIPS_CPU
634	select CSRC_R4K
635	select CEVT_R4K
636	select SYS_HAS_CPU_MIPS32_R1
637	select SYS_HAS_CPU_MIPS32_R2
638	select SYS_SUPPORTS_BIG_ENDIAN
639	select SYS_SUPPORTS_32BIT_KERNEL
640	select SYS_SUPPORTS_MIPS16
641	select SYS_SUPPORTS_MULTITHREADING
642	select SYS_SUPPORTS_VPE_LOADER
643	select SYS_HAS_EARLY_PRINTK
644	select SYS_HAS_EARLY_PRINTK_8250
645	select USE_GENERIC_EARLY_PRINTK_8250
646	select BOOT_RAW
647	select PINCTRL
648	select USE_OF
649
650config SGI_IP22
651	bool "SGI IP22 (Indy/Indigo2)"
652	select ARC_MEMORY
653	select ARC_PROMLIB
654	select FW_ARC
655	select FW_ARC32
656	select ARCH_MIGHT_HAVE_PC_SERIO
657	select BOOT_ELF32
658	select CEVT_R4K
659	select CSRC_R4K
660	select DEFAULT_SGI_PARTITION
661	select DMA_NONCOHERENT
662	select HAVE_EISA
663	select I8253
664	select I8259
665	select IP22_CPU_SCACHE
666	select IRQ_MIPS_CPU
667	select GENERIC_ISA_DMA_SUPPORT_BROKEN
668	select SGI_HAS_I8042
669	select SGI_HAS_INDYDOG
670	select SGI_HAS_HAL2
671	select SGI_HAS_SEEQ
672	select SGI_HAS_WD93
673	select SGI_HAS_ZILOG
674	select SWAP_IO_SPACE
675	select SYS_HAS_CPU_R4X00
676	select SYS_HAS_CPU_R5000
677	select SYS_HAS_EARLY_PRINTK
678	select SYS_SUPPORTS_32BIT_KERNEL
679	select SYS_SUPPORTS_64BIT_KERNEL
680	select SYS_SUPPORTS_BIG_ENDIAN
681	select WAR_R4600_V1_INDEX_ICACHEOP
682	select WAR_R4600_V1_HIT_CACHEOP
683	select WAR_R4600_V2_HIT_CACHEOP
684	select MIPS_L1_CACHE_SHIFT_7
685	help
686	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
687	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
688	  that runs on these, say Y here.
689
690config SGI_IP27
691	bool "SGI IP27 (Origin200/2000)"
692	select ARCH_HAS_PHYS_TO_DMA
693	select ARCH_SPARSEMEM_ENABLE
694	select FW_ARC
695	select FW_ARC64
696	select ARC_CMDLINE_ONLY
697	select BOOT_ELF64
698	select DEFAULT_SGI_PARTITION
699	select FORCE_PCI
700	select SYS_HAS_EARLY_PRINTK
701	select HAVE_PCI
702	select IRQ_MIPS_CPU
703	select IRQ_DOMAIN_HIERARCHY
704	select NR_CPUS_DEFAULT_64
705	select PCI_DRIVERS_GENERIC
706	select PCI_XTALK_BRIDGE
707	select SYS_HAS_CPU_R10000
708	select SYS_SUPPORTS_64BIT_KERNEL
709	select SYS_SUPPORTS_BIG_ENDIAN
710	select SYS_SUPPORTS_NUMA
711	select SYS_SUPPORTS_SMP
712	select WAR_R10000_LLSC
713	select MIPS_L1_CACHE_SHIFT_7
714	select NUMA
715	help
716	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
717	  workstations.  To compile a Linux kernel that runs on these, say Y
718	  here.
719
720config SGI_IP28
721	bool "SGI IP28 (Indigo2 R10k)"
722	select ARC_MEMORY
723	select ARC_PROMLIB
724	select FW_ARC
725	select FW_ARC64
726	select ARCH_MIGHT_HAVE_PC_SERIO
727	select BOOT_ELF64
728	select CEVT_R4K
729	select CSRC_R4K
730	select DEFAULT_SGI_PARTITION
731	select DMA_NONCOHERENT
732	select GENERIC_ISA_DMA_SUPPORT_BROKEN
733	select IRQ_MIPS_CPU
734	select HAVE_EISA
735	select I8253
736	select I8259
737	select SGI_HAS_I8042
738	select SGI_HAS_INDYDOG
739	select SGI_HAS_HAL2
740	select SGI_HAS_SEEQ
741	select SGI_HAS_WD93
742	select SGI_HAS_ZILOG
743	select SWAP_IO_SPACE
744	select SYS_HAS_CPU_R10000
745	select SYS_HAS_EARLY_PRINTK
746	select SYS_SUPPORTS_64BIT_KERNEL
747	select SYS_SUPPORTS_BIG_ENDIAN
748	select WAR_R10000_LLSC
749	select MIPS_L1_CACHE_SHIFT_7
750	help
751	  This is the SGI Indigo2 with R10000 processor.  To compile a Linux
752	  kernel that runs on these, say Y here.
753
754config SGI_IP30
755	bool "SGI IP30 (Octane/Octane2)"
756	select ARCH_HAS_PHYS_TO_DMA
757	select FW_ARC
758	select FW_ARC64
759	select BOOT_ELF64
760	select CEVT_R4K
761	select CSRC_R4K
762	select FORCE_PCI
763	select SYNC_R4K if SMP
764	select ZONE_DMA32
765	select HAVE_PCI
766	select IRQ_MIPS_CPU
767	select IRQ_DOMAIN_HIERARCHY
768	select NR_CPUS_DEFAULT_2
769	select PCI_DRIVERS_GENERIC
770	select PCI_XTALK_BRIDGE
771	select SYS_HAS_EARLY_PRINTK
772	select SYS_HAS_CPU_R10000
773	select SYS_SUPPORTS_64BIT_KERNEL
774	select SYS_SUPPORTS_BIG_ENDIAN
775	select SYS_SUPPORTS_SMP
776	select WAR_R10000_LLSC
777	select MIPS_L1_CACHE_SHIFT_7
778	select ARC_MEMORY
779	help
780	  These are the SGI Octane and Octane2 graphics workstations.  To
781	  compile a Linux kernel that runs on these, say Y here.
782
783config SGI_IP32
784	bool "SGI IP32 (O2)"
785	select ARC_MEMORY
786	select ARC_PROMLIB
787	select ARCH_HAS_PHYS_TO_DMA
788	select FW_ARC
789	select FW_ARC32
790	select BOOT_ELF32
791	select CEVT_R4K
792	select CSRC_R4K
793	select DMA_NONCOHERENT
794	select HAVE_PCI
795	select IRQ_MIPS_CPU
796	select R5000_CPU_SCACHE
797	select RM7000_CPU_SCACHE
798	select SYS_HAS_CPU_R5000
799	select SYS_HAS_CPU_R10000 if BROKEN
800	select SYS_HAS_CPU_RM7000
801	select SYS_HAS_CPU_NEVADA
802	select SYS_SUPPORTS_64BIT_KERNEL
803	select SYS_SUPPORTS_BIG_ENDIAN
804	select WAR_ICACHE_REFILLS
805	help
806	  If you want this kernel to run on SGI O2 workstation, say Y here.
807
808config SIBYTE_CRHINE
809	bool "Sibyte BCM91120C-CRhine"
810	select BOOT_ELF32
811	select SIBYTE_BCM1120
812	select SWAP_IO_SPACE
813	select SYS_HAS_CPU_SB1
814	select SYS_SUPPORTS_BIG_ENDIAN
815	select SYS_SUPPORTS_LITTLE_ENDIAN
816
817config SIBYTE_CARMEL
818	bool "Sibyte BCM91120x-Carmel"
819	select BOOT_ELF32
820	select SIBYTE_BCM1120
821	select SWAP_IO_SPACE
822	select SYS_HAS_CPU_SB1
823	select SYS_SUPPORTS_BIG_ENDIAN
824	select SYS_SUPPORTS_LITTLE_ENDIAN
825
826config SIBYTE_CRHONE
827	bool "Sibyte BCM91125C-CRhone"
828	select BOOT_ELF32
829	select SIBYTE_BCM1125
830	select SWAP_IO_SPACE
831	select SYS_HAS_CPU_SB1
832	select SYS_SUPPORTS_BIG_ENDIAN
833	select SYS_SUPPORTS_HIGHMEM
834	select SYS_SUPPORTS_LITTLE_ENDIAN
835
836config SIBYTE_RHONE
837	bool "Sibyte BCM91125E-Rhone"
838	select BOOT_ELF32
839	select SIBYTE_BCM1125H
840	select SWAP_IO_SPACE
841	select SYS_HAS_CPU_SB1
842	select SYS_SUPPORTS_BIG_ENDIAN
843	select SYS_SUPPORTS_LITTLE_ENDIAN
844
845config SIBYTE_SWARM
846	bool "Sibyte BCM91250A-SWARM"
847	select BOOT_ELF32
848	select HAVE_PATA_PLATFORM
849	select SIBYTE_SB1250
850	select SWAP_IO_SPACE
851	select SYS_HAS_CPU_SB1
852	select SYS_SUPPORTS_BIG_ENDIAN
853	select SYS_SUPPORTS_HIGHMEM
854	select SYS_SUPPORTS_LITTLE_ENDIAN
855	select ZONE_DMA32 if 64BIT
856	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
857
858config SIBYTE_LITTLESUR
859	bool "Sibyte BCM91250C2-LittleSur"
860	select BOOT_ELF32
861	select HAVE_PATA_PLATFORM
862	select SIBYTE_SB1250
863	select SWAP_IO_SPACE
864	select SYS_HAS_CPU_SB1
865	select SYS_SUPPORTS_BIG_ENDIAN
866	select SYS_SUPPORTS_HIGHMEM
867	select SYS_SUPPORTS_LITTLE_ENDIAN
868	select ZONE_DMA32 if 64BIT
869
870config SIBYTE_SENTOSA
871	bool "Sibyte BCM91250E-Sentosa"
872	select BOOT_ELF32
873	select SIBYTE_SB1250
874	select SWAP_IO_SPACE
875	select SYS_HAS_CPU_SB1
876	select SYS_SUPPORTS_BIG_ENDIAN
877	select SYS_SUPPORTS_LITTLE_ENDIAN
878	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
879
880config SIBYTE_BIGSUR
881	bool "Sibyte BCM91480B-BigSur"
882	select BOOT_ELF32
883	select NR_CPUS_DEFAULT_4
884	select SIBYTE_BCM1x80
885	select SWAP_IO_SPACE
886	select SYS_HAS_CPU_SB1
887	select SYS_SUPPORTS_BIG_ENDIAN
888	select SYS_SUPPORTS_HIGHMEM
889	select SYS_SUPPORTS_LITTLE_ENDIAN
890	select ZONE_DMA32 if 64BIT
891	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
892
893config SNI_RM
894	bool "SNI RM200/300/400"
895	select ARC_MEMORY
896	select ARC_PROMLIB
897	select FW_ARC if CPU_LITTLE_ENDIAN
898	select FW_ARC32 if CPU_LITTLE_ENDIAN
899	select FW_SNIPROM if CPU_BIG_ENDIAN
900	select ARCH_MAY_HAVE_PC_FDC
901	select ARCH_MIGHT_HAVE_PC_PARPORT
902	select ARCH_MIGHT_HAVE_PC_SERIO
903	select BOOT_ELF32
904	select CEVT_R4K
905	select CSRC_R4K
906	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
907	select DMA_NONCOHERENT
908	select GENERIC_ISA_DMA
909	select HAVE_EISA
910	select HAVE_PCSPKR_PLATFORM
911	select HAVE_PCI
912	select IRQ_MIPS_CPU
913	select I8253
914	select I8259
915	select ISA
916	select MIPS_L1_CACHE_SHIFT_6
917	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
918	select SYS_HAS_CPU_R4X00
919	select SYS_HAS_CPU_R5000
920	select SYS_HAS_CPU_R10000
921	select R5000_CPU_SCACHE
922	select SYS_HAS_EARLY_PRINTK
923	select SYS_SUPPORTS_32BIT_KERNEL
924	select SYS_SUPPORTS_64BIT_KERNEL
925	select SYS_SUPPORTS_BIG_ENDIAN
926	select SYS_SUPPORTS_HIGHMEM
927	select SYS_SUPPORTS_LITTLE_ENDIAN
928	select WAR_R4600_V2_HIT_CACHEOP
929	help
930	  The SNI RM200/300/400 are MIPS-based machines manufactured by
931	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
932	  Technology and now in turn merged with Fujitsu.  Say Y here to
933	  support this machine type.
934
935config MACH_TX39XX
936	bool "Toshiba TX39 series based machines"
937
938config MACH_TX49XX
939	bool "Toshiba TX49 series based machines"
940	select WAR_TX49XX_ICACHE_INDEX_INV
941
942config MIKROTIK_RB532
943	bool "Mikrotik RB532 boards"
944	select CEVT_R4K
945	select CSRC_R4K
946	select DMA_NONCOHERENT
947	select HAVE_PCI
948	select IRQ_MIPS_CPU
949	select SYS_HAS_CPU_MIPS32_R1
950	select SYS_SUPPORTS_32BIT_KERNEL
951	select SYS_SUPPORTS_LITTLE_ENDIAN
952	select SWAP_IO_SPACE
953	select BOOT_RAW
954	select GPIOLIB
955	select MIPS_L1_CACHE_SHIFT_4
956	help
957	  Support the Mikrotik(tm) RouterBoard 532 series,
958	  based on the IDT RC32434 SoC.
959
960config CAVIUM_OCTEON_SOC
961	bool "Cavium Networks Octeon SoC based boards"
962	select CEVT_R4K
963	select ARCH_HAS_PHYS_TO_DMA
964	select HAVE_RAPIDIO
965	select PHYS_ADDR_T_64BIT
966	select SYS_SUPPORTS_64BIT_KERNEL
967	select SYS_SUPPORTS_BIG_ENDIAN
968	select EDAC_SUPPORT
969	select EDAC_ATOMIC_SCRUB
970	select SYS_SUPPORTS_LITTLE_ENDIAN
971	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
972	select SYS_HAS_EARLY_PRINTK
973	select SYS_HAS_CPU_CAVIUM_OCTEON
974	select HAVE_PCI
975	select HAVE_PLAT_DELAY
976	select HAVE_PLAT_FW_INIT_CMDLINE
977	select HAVE_PLAT_MEMCPY
978	select ZONE_DMA32
979	select GPIOLIB
980	select USE_OF
981	select ARCH_SPARSEMEM_ENABLE
982	select SYS_SUPPORTS_SMP
983	select NR_CPUS_DEFAULT_64
984	select MIPS_NR_CPU_NR_MAP_1024
985	select BUILTIN_DTB
986	select MTD
987	select MTD_COMPLEX_MAPPINGS
988	select SWIOTLB
989	select SYS_SUPPORTS_RELOCATABLE
990	help
991	  This option supports all of the Octeon reference boards from Cavium
992	  Networks. It builds a kernel that dynamically determines the Octeon
993	  CPU type and supports all known board reference implementations.
994	  Some of the supported boards are:
995		EBT3000
996		EBH3000
997		EBH3100
998		Thunder
999		Kodama
1000		Hikari
1001	  Say Y here for most Octeon reference boards.
1002
1003endchoice
1004
1005source "arch/mips/alchemy/Kconfig"
1006source "arch/mips/ath25/Kconfig"
1007source "arch/mips/ath79/Kconfig"
1008source "arch/mips/bcm47xx/Kconfig"
1009source "arch/mips/bcm63xx/Kconfig"
1010source "arch/mips/bmips/Kconfig"
1011source "arch/mips/generic/Kconfig"
1012source "arch/mips/ingenic/Kconfig"
1013source "arch/mips/jazz/Kconfig"
1014source "arch/mips/lantiq/Kconfig"
1015source "arch/mips/pic32/Kconfig"
1016source "arch/mips/ralink/Kconfig"
1017source "arch/mips/sgi-ip27/Kconfig"
1018source "arch/mips/sibyte/Kconfig"
1019source "arch/mips/txx9/Kconfig"
1020source "arch/mips/vr41xx/Kconfig"
1021source "arch/mips/cavium-octeon/Kconfig"
1022source "arch/mips/loongson2ef/Kconfig"
1023source "arch/mips/loongson32/Kconfig"
1024source "arch/mips/loongson64/Kconfig"
1025
1026endmenu
1027
1028config GENERIC_HWEIGHT
1029	bool
1030	default y
1031
1032config GENERIC_CALIBRATE_DELAY
1033	bool
1034	default y
1035
1036config SCHED_OMIT_FRAME_POINTER
1037	bool
1038	default y
1039
1040#
1041# Select some configuration options automatically based on user selections.
1042#
1043config FW_ARC
1044	bool
1045
1046config ARCH_MAY_HAVE_PC_FDC
1047	bool
1048
1049config BOOT_RAW
1050	bool
1051
1052config CEVT_BCM1480
1053	bool
1054
1055config CEVT_DS1287
1056	bool
1057
1058config CEVT_GT641XX
1059	bool
1060
1061config CEVT_R4K
1062	bool
1063
1064config CEVT_SB1250
1065	bool
1066
1067config CEVT_TXX9
1068	bool
1069
1070config CSRC_BCM1480
1071	bool
1072
1073config CSRC_IOASIC
1074	bool
1075
1076config CSRC_R4K
1077	select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1078	bool
1079
1080config CSRC_SB1250
1081	bool
1082
1083config MIPS_CLOCK_VSYSCALL
1084	def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1085
1086config GPIO_TXX9
1087	select GPIOLIB
1088	bool
1089
1090config FW_CFE
1091	bool
1092
1093config ARCH_SUPPORTS_UPROBES
1094	bool
1095
1096config DMA_PERDEV_COHERENT
1097	bool
1098	select ARCH_HAS_SETUP_DMA_OPS
1099	select DMA_NONCOHERENT
1100
1101config DMA_NONCOHERENT
1102	bool
1103	#
1104	# MIPS allows mixing "slightly different" Cacheability and Coherency
1105	# Attribute bits.  It is believed that the uncached access through
1106	# KSEG1 and the implementation specific "uncached accelerated" used
1107	# by pgprot_writcombine can be mixed, and the latter sometimes provides
1108	# significant advantages.
1109	#
1110	select ARCH_HAS_DMA_WRITE_COMBINE
1111	select ARCH_HAS_DMA_PREP_COHERENT
1112	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1113	select ARCH_HAS_DMA_SET_UNCACHED
1114	select DMA_NONCOHERENT_MMAP
1115	select NEED_DMA_MAP_STATE
1116
1117config SYS_HAS_EARLY_PRINTK
1118	bool
1119
1120config SYS_SUPPORTS_HOTPLUG_CPU
1121	bool
1122
1123config MIPS_BONITO64
1124	bool
1125
1126config MIPS_MSC
1127	bool
1128
1129config SYNC_R4K
1130	bool
1131
1132config NO_IOPORT_MAP
1133	def_bool n
1134
1135config GENERIC_CSUM
1136	def_bool CPU_NO_LOAD_STORE_LR
1137
1138config GENERIC_ISA_DMA
1139	bool
1140	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1141	select ISA_DMA_API
1142
1143config GENERIC_ISA_DMA_SUPPORT_BROKEN
1144	bool
1145	select GENERIC_ISA_DMA
1146
1147config HAVE_PLAT_DELAY
1148	bool
1149
1150config HAVE_PLAT_FW_INIT_CMDLINE
1151	bool
1152
1153config HAVE_PLAT_MEMCPY
1154	bool
1155
1156config ISA_DMA_API
1157	bool
1158
1159config SYS_SUPPORTS_RELOCATABLE
1160	bool
1161	help
1162	  Selected if the platform supports relocating the kernel.
1163	  The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1164	  to allow access to command line and entropy sources.
1165
1166#
1167# Endianness selection.  Sufficiently obscure so many users don't know what to
1168# answer,so we try hard to limit the available choices.  Also the use of a
1169# choice statement should be more obvious to the user.
1170#
1171choice
1172	prompt "Endianness selection"
1173	help
1174	  Some MIPS machines can be configured for either little or big endian
1175	  byte order. These modes require different kernels and a different
1176	  Linux distribution.  In general there is one preferred byteorder for a
1177	  particular system but some systems are just as commonly used in the
1178	  one or the other endianness.
1179
1180config CPU_BIG_ENDIAN
1181	bool "Big endian"
1182	depends on SYS_SUPPORTS_BIG_ENDIAN
1183
1184config CPU_LITTLE_ENDIAN
1185	bool "Little endian"
1186	depends on SYS_SUPPORTS_LITTLE_ENDIAN
1187
1188endchoice
1189
1190config EXPORT_UASM
1191	bool
1192
1193config SYS_SUPPORTS_APM_EMULATION
1194	bool
1195
1196config SYS_SUPPORTS_BIG_ENDIAN
1197	bool
1198
1199config SYS_SUPPORTS_LITTLE_ENDIAN
1200	bool
1201
1202config MIPS_HUGE_TLB_SUPPORT
1203	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1204
1205config IRQ_MSP_SLP
1206	bool
1207
1208config IRQ_MSP_CIC
1209	bool
1210
1211config IRQ_TXX9
1212	bool
1213
1214config IRQ_GT641XX
1215	bool
1216
1217config PCI_GT64XXX_PCI0
1218	bool
1219
1220config PCI_XTALK_BRIDGE
1221	bool
1222
1223config NO_EXCEPT_FILL
1224	bool
1225
1226config MIPS_SPRAM
1227	bool
1228
1229config SWAP_IO_SPACE
1230	bool
1231
1232config SGI_HAS_INDYDOG
1233	bool
1234
1235config SGI_HAS_HAL2
1236	bool
1237
1238config SGI_HAS_SEEQ
1239	bool
1240
1241config SGI_HAS_WD93
1242	bool
1243
1244config SGI_HAS_ZILOG
1245	bool
1246
1247config SGI_HAS_I8042
1248	bool
1249
1250config DEFAULT_SGI_PARTITION
1251	bool
1252
1253config FW_ARC32
1254	bool
1255
1256config FW_SNIPROM
1257	bool
1258
1259config BOOT_ELF32
1260	bool
1261
1262config MIPS_L1_CACHE_SHIFT_4
1263	bool
1264
1265config MIPS_L1_CACHE_SHIFT_5
1266	bool
1267
1268config MIPS_L1_CACHE_SHIFT_6
1269	bool
1270
1271config MIPS_L1_CACHE_SHIFT_7
1272	bool
1273
1274config MIPS_L1_CACHE_SHIFT
1275	int
1276	default "7" if MIPS_L1_CACHE_SHIFT_7
1277	default "6" if MIPS_L1_CACHE_SHIFT_6
1278	default "5" if MIPS_L1_CACHE_SHIFT_5
1279	default "4" if MIPS_L1_CACHE_SHIFT_4
1280	default "5"
1281
1282config ARC_CMDLINE_ONLY
1283	bool
1284
1285config ARC_CONSOLE
1286	bool "ARC console support"
1287	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1288
1289config ARC_MEMORY
1290	bool
1291
1292config ARC_PROMLIB
1293	bool
1294
1295config FW_ARC64
1296	bool
1297
1298config BOOT_ELF64
1299	bool
1300
1301menu "CPU selection"
1302
1303choice
1304	prompt "CPU type"
1305	default CPU_R4X00
1306
1307config CPU_LOONGSON64
1308	bool "Loongson 64-bit CPU"
1309	depends on SYS_HAS_CPU_LOONGSON64
1310	select ARCH_HAS_PHYS_TO_DMA
1311	select CPU_MIPSR2
1312	select CPU_HAS_PREFETCH
1313	select CPU_SUPPORTS_64BIT_KERNEL
1314	select CPU_SUPPORTS_HIGHMEM
1315	select CPU_SUPPORTS_HUGEPAGES
1316	select CPU_SUPPORTS_MSA
1317	select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1318	select CPU_MIPSR2_IRQ_VI
1319	select WEAK_ORDERING
1320	select WEAK_REORDERING_BEYOND_LLSC
1321	select MIPS_ASID_BITS_VARIABLE
1322	select MIPS_PGD_C0_CONTEXT
1323	select MIPS_L1_CACHE_SHIFT_6
1324	select MIPS_FP_SUPPORT
1325	select GPIOLIB
1326	select SWIOTLB
1327	select HAVE_KVM
1328	help
1329		The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1330		cores implements the MIPS64R2 instruction set with many extensions,
1331		including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1332		3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1333		Loongson-2E/2F is not covered here and will be removed in future.
1334
1335config LOONGSON3_ENHANCEMENT
1336	bool "New Loongson-3 CPU Enhancements"
1337	default n
1338	depends on CPU_LOONGSON64
1339	help
1340	  New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1341	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1342	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1343	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1344	  Fast TLB refill support, etc.
1345
1346	  This option enable those enhancements which are not probed at run
1347	  time. If you want a generic kernel to run on all Loongson 3 machines,
1348	  please say 'N' here. If you want a high-performance kernel to run on
1349	  new Loongson-3 machines only, please say 'Y' here.
1350
1351config CPU_LOONGSON3_WORKAROUNDS
1352	bool "Old Loongson-3 LLSC Workarounds"
1353	default y if SMP
1354	depends on CPU_LOONGSON64
1355	help
1356	  Loongson-3 processors have the llsc issues which require workarounds.
1357	  Without workarounds the system may hang unexpectedly.
1358
1359	  Newer Loongson-3 will fix these issues and no workarounds are needed.
1360	  The workarounds have no significant side effect on them but may
1361	  decrease the performance of the system so this option should be
1362	  disabled unless the kernel is intended to be run on old systems.
1363
1364	  If unsure, please say Y.
1365
1366config CPU_LOONGSON3_CPUCFG_EMULATION
1367	bool "Emulate the CPUCFG instruction on older Loongson cores"
1368	default y
1369	depends on CPU_LOONGSON64
1370	help
1371	  Loongson-3A R4 and newer have the CPUCFG instruction available for
1372	  userland to query CPU capabilities, much like CPUID on x86. This
1373	  option provides emulation of the instruction on older Loongson
1374	  cores, back to Loongson-3A1000.
1375
1376	  If unsure, please say Y.
1377
1378config CPU_LOONGSON2E
1379	bool "Loongson 2E"
1380	depends on SYS_HAS_CPU_LOONGSON2E
1381	select CPU_LOONGSON2EF
1382	help
1383	  The Loongson 2E processor implements the MIPS III instruction set
1384	  with many extensions.
1385
1386	  It has an internal FPGA northbridge, which is compatible to
1387	  bonito64.
1388
1389config CPU_LOONGSON2F
1390	bool "Loongson 2F"
1391	depends on SYS_HAS_CPU_LOONGSON2F
1392	select CPU_LOONGSON2EF
1393	select GPIOLIB
1394	help
1395	  The Loongson 2F processor implements the MIPS III instruction set
1396	  with many extensions.
1397
1398	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1399	  have a similar programming interface with FPGA northbridge used in
1400	  Loongson2E.
1401
1402config CPU_LOONGSON1B
1403	bool "Loongson 1B"
1404	depends on SYS_HAS_CPU_LOONGSON1B
1405	select CPU_LOONGSON32
1406	select LEDS_GPIO_REGISTER
1407	help
1408	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1409	  Release 1 instruction set and part of the MIPS32 Release 2
1410	  instruction set.
1411
1412config CPU_LOONGSON1C
1413	bool "Loongson 1C"
1414	depends on SYS_HAS_CPU_LOONGSON1C
1415	select CPU_LOONGSON32
1416	select LEDS_GPIO_REGISTER
1417	help
1418	  The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1419	  Release 1 instruction set and part of the MIPS32 Release 2
1420	  instruction set.
1421
1422config CPU_MIPS32_R1
1423	bool "MIPS32 Release 1"
1424	depends on SYS_HAS_CPU_MIPS32_R1
1425	select CPU_HAS_PREFETCH
1426	select CPU_SUPPORTS_32BIT_KERNEL
1427	select CPU_SUPPORTS_HIGHMEM
1428	help
1429	  Choose this option to build a kernel for release 1 or later of the
1430	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1431	  MIPS processor are based on a MIPS32 processor.  If you know the
1432	  specific type of processor in your system, choose those that one
1433	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1434	  Release 2 of the MIPS32 architecture is available since several
1435	  years so chances are you even have a MIPS32 Release 2 processor
1436	  in which case you should choose CPU_MIPS32_R2 instead for better
1437	  performance.
1438
1439config CPU_MIPS32_R2
1440	bool "MIPS32 Release 2"
1441	depends on SYS_HAS_CPU_MIPS32_R2
1442	select CPU_HAS_PREFETCH
1443	select CPU_SUPPORTS_32BIT_KERNEL
1444	select CPU_SUPPORTS_HIGHMEM
1445	select CPU_SUPPORTS_MSA
1446	select HAVE_KVM
1447	help
1448	  Choose this option to build a kernel for release 2 or later of the
1449	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1450	  MIPS processor are based on a MIPS32 processor.  If you know the
1451	  specific type of processor in your system, choose those that one
1452	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1453
1454config CPU_MIPS32_R5
1455	bool "MIPS32 Release 5"
1456	depends on SYS_HAS_CPU_MIPS32_R5
1457	select CPU_HAS_PREFETCH
1458	select CPU_SUPPORTS_32BIT_KERNEL
1459	select CPU_SUPPORTS_HIGHMEM
1460	select CPU_SUPPORTS_MSA
1461	select HAVE_KVM
1462	select MIPS_O32_FP64_SUPPORT
1463	help
1464	  Choose this option to build a kernel for release 5 or later of the
1465	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
1466	  family, are based on a MIPS32r5 processor. If you own an older
1467	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1468
1469config CPU_MIPS32_R6
1470	bool "MIPS32 Release 6"
1471	depends on SYS_HAS_CPU_MIPS32_R6
1472	select CPU_HAS_PREFETCH
1473	select CPU_NO_LOAD_STORE_LR
1474	select CPU_SUPPORTS_32BIT_KERNEL
1475	select CPU_SUPPORTS_HIGHMEM
1476	select CPU_SUPPORTS_MSA
1477	select HAVE_KVM
1478	select MIPS_O32_FP64_SUPPORT
1479	help
1480	  Choose this option to build a kernel for release 6 or later of the
1481	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
1482	  family, are based on a MIPS32r6 processor. If you own an older
1483	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1484
1485config CPU_MIPS64_R1
1486	bool "MIPS64 Release 1"
1487	depends on SYS_HAS_CPU_MIPS64_R1
1488	select CPU_HAS_PREFETCH
1489	select CPU_SUPPORTS_32BIT_KERNEL
1490	select CPU_SUPPORTS_64BIT_KERNEL
1491	select CPU_SUPPORTS_HIGHMEM
1492	select CPU_SUPPORTS_HUGEPAGES
1493	help
1494	  Choose this option to build a kernel for release 1 or later of the
1495	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1496	  MIPS processor are based on a MIPS64 processor.  If you know the
1497	  specific type of processor in your system, choose those that one
1498	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1499	  Release 2 of the MIPS64 architecture is available since several
1500	  years so chances are you even have a MIPS64 Release 2 processor
1501	  in which case you should choose CPU_MIPS64_R2 instead for better
1502	  performance.
1503
1504config CPU_MIPS64_R2
1505	bool "MIPS64 Release 2"
1506	depends on SYS_HAS_CPU_MIPS64_R2
1507	select CPU_HAS_PREFETCH
1508	select CPU_SUPPORTS_32BIT_KERNEL
1509	select CPU_SUPPORTS_64BIT_KERNEL
1510	select CPU_SUPPORTS_HIGHMEM
1511	select CPU_SUPPORTS_HUGEPAGES
1512	select CPU_SUPPORTS_MSA
1513	select HAVE_KVM
1514	help
1515	  Choose this option to build a kernel for release 2 or later of the
1516	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1517	  MIPS processor are based on a MIPS64 processor.  If you know the
1518	  specific type of processor in your system, choose those that one
1519	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1520
1521config CPU_MIPS64_R5
1522	bool "MIPS64 Release 5"
1523	depends on SYS_HAS_CPU_MIPS64_R5
1524	select CPU_HAS_PREFETCH
1525	select CPU_SUPPORTS_32BIT_KERNEL
1526	select CPU_SUPPORTS_64BIT_KERNEL
1527	select CPU_SUPPORTS_HIGHMEM
1528	select CPU_SUPPORTS_HUGEPAGES
1529	select CPU_SUPPORTS_MSA
1530	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1531	select HAVE_KVM
1532	help
1533	  Choose this option to build a kernel for release 5 or later of the
1534	  MIPS64 architecture.  This is a intermediate MIPS architecture
1535	  release partly implementing release 6 features. Though there is no
1536	  any hardware known to be based on this release.
1537
1538config CPU_MIPS64_R6
1539	bool "MIPS64 Release 6"
1540	depends on SYS_HAS_CPU_MIPS64_R6
1541	select CPU_HAS_PREFETCH
1542	select CPU_NO_LOAD_STORE_LR
1543	select CPU_SUPPORTS_32BIT_KERNEL
1544	select CPU_SUPPORTS_64BIT_KERNEL
1545	select CPU_SUPPORTS_HIGHMEM
1546	select CPU_SUPPORTS_HUGEPAGES
1547	select CPU_SUPPORTS_MSA
1548	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1549	select HAVE_KVM
1550	help
1551	  Choose this option to build a kernel for release 6 or later of the
1552	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
1553	  family, are based on a MIPS64r6 processor. If you own an older
1554	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1555
1556config CPU_P5600
1557	bool "MIPS Warrior P5600"
1558	depends on SYS_HAS_CPU_P5600
1559	select CPU_HAS_PREFETCH
1560	select CPU_SUPPORTS_32BIT_KERNEL
1561	select CPU_SUPPORTS_HIGHMEM
1562	select CPU_SUPPORTS_MSA
1563	select CPU_SUPPORTS_CPUFREQ
1564	select CPU_MIPSR2_IRQ_VI
1565	select CPU_MIPSR2_IRQ_EI
1566	select HAVE_KVM
1567	select MIPS_O32_FP64_SUPPORT
1568	help
1569	  Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1570	  It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1571	  MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1572	  level features like up to six P5600 calculation cores, CM2 with L2
1573	  cache, IOCU/IOMMU (though might be unused depending on the system-
1574	  specific IP core configuration), GIC, CPC, virtualisation module,
1575	  eJTAG and PDtrace.
1576
1577config CPU_R3000
1578	bool "R3000"
1579	depends on SYS_HAS_CPU_R3000
1580	select CPU_HAS_WB
1581	select CPU_R3K_TLB
1582	select CPU_SUPPORTS_32BIT_KERNEL
1583	select CPU_SUPPORTS_HIGHMEM
1584	help
1585	  Please make sure to pick the right CPU type. Linux/MIPS is not
1586	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1587	  *not* work on R4000 machines and vice versa.  However, since most
1588	  of the supported machines have an R4000 (or similar) CPU, R4x00
1589	  might be a safe bet.  If the resulting kernel does not work,
1590	  try to recompile with R3000.
1591
1592config CPU_TX39XX
1593	bool "R39XX"
1594	depends on SYS_HAS_CPU_TX39XX
1595	select CPU_SUPPORTS_32BIT_KERNEL
1596	select CPU_R3K_TLB
1597
1598config CPU_VR41XX
1599	bool "R41xx"
1600	depends on SYS_HAS_CPU_VR41XX
1601	select CPU_SUPPORTS_32BIT_KERNEL
1602	select CPU_SUPPORTS_64BIT_KERNEL
1603	help
1604	  The options selects support for the NEC VR4100 series of processors.
1605	  Only choose this option if you have one of these processors as a
1606	  kernel built with this option will not run on any other type of
1607	  processor or vice versa.
1608
1609config CPU_R4300
1610	bool "R4300"
1611	depends on SYS_HAS_CPU_R4300
1612	select CPU_SUPPORTS_32BIT_KERNEL
1613	select CPU_SUPPORTS_64BIT_KERNEL
1614	select CPU_HAS_LOAD_STORE_LR
1615	help
1616	  MIPS Technologies R4300-series processors.
1617
1618config CPU_R4X00
1619	bool "R4x00"
1620	depends on SYS_HAS_CPU_R4X00
1621	select CPU_SUPPORTS_32BIT_KERNEL
1622	select CPU_SUPPORTS_64BIT_KERNEL
1623	select CPU_SUPPORTS_HUGEPAGES
1624	help
1625	  MIPS Technologies R4000-series processors other than 4300, including
1626	  the R4000, R4400, R4600, and 4700.
1627
1628config CPU_TX49XX
1629	bool "R49XX"
1630	depends on SYS_HAS_CPU_TX49XX
1631	select CPU_HAS_PREFETCH
1632	select CPU_SUPPORTS_32BIT_KERNEL
1633	select CPU_SUPPORTS_64BIT_KERNEL
1634	select CPU_SUPPORTS_HUGEPAGES
1635
1636config CPU_R5000
1637	bool "R5000"
1638	depends on SYS_HAS_CPU_R5000
1639	select CPU_SUPPORTS_32BIT_KERNEL
1640	select CPU_SUPPORTS_64BIT_KERNEL
1641	select CPU_SUPPORTS_HUGEPAGES
1642	help
1643	  MIPS Technologies R5000-series processors other than the Nevada.
1644
1645config CPU_R5500
1646	bool "R5500"
1647	depends on SYS_HAS_CPU_R5500
1648	select CPU_SUPPORTS_32BIT_KERNEL
1649	select CPU_SUPPORTS_64BIT_KERNEL
1650	select CPU_SUPPORTS_HUGEPAGES
1651	help
1652	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1653	  instruction set.
1654
1655config CPU_NEVADA
1656	bool "RM52xx"
1657	depends on SYS_HAS_CPU_NEVADA
1658	select CPU_SUPPORTS_32BIT_KERNEL
1659	select CPU_SUPPORTS_64BIT_KERNEL
1660	select CPU_SUPPORTS_HUGEPAGES
1661	help
1662	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1663
1664config CPU_R10000
1665	bool "R10000"
1666	depends on SYS_HAS_CPU_R10000
1667	select CPU_HAS_PREFETCH
1668	select CPU_SUPPORTS_32BIT_KERNEL
1669	select CPU_SUPPORTS_64BIT_KERNEL
1670	select CPU_SUPPORTS_HIGHMEM
1671	select CPU_SUPPORTS_HUGEPAGES
1672	help
1673	  MIPS Technologies R10000-series processors.
1674
1675config CPU_RM7000
1676	bool "RM7000"
1677	depends on SYS_HAS_CPU_RM7000
1678	select CPU_HAS_PREFETCH
1679	select CPU_SUPPORTS_32BIT_KERNEL
1680	select CPU_SUPPORTS_64BIT_KERNEL
1681	select CPU_SUPPORTS_HIGHMEM
1682	select CPU_SUPPORTS_HUGEPAGES
1683
1684config CPU_SB1
1685	bool "SB1"
1686	depends on SYS_HAS_CPU_SB1
1687	select CPU_SUPPORTS_32BIT_KERNEL
1688	select CPU_SUPPORTS_64BIT_KERNEL
1689	select CPU_SUPPORTS_HIGHMEM
1690	select CPU_SUPPORTS_HUGEPAGES
1691	select WEAK_ORDERING
1692
1693config CPU_CAVIUM_OCTEON
1694	bool "Cavium Octeon processor"
1695	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1696	select CPU_HAS_PREFETCH
1697	select CPU_SUPPORTS_64BIT_KERNEL
1698	select WEAK_ORDERING
1699	select CPU_SUPPORTS_HIGHMEM
1700	select CPU_SUPPORTS_HUGEPAGES
1701	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1702	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1703	select MIPS_L1_CACHE_SHIFT_7
1704	select HAVE_KVM
1705	help
1706	  The Cavium Octeon processor is a highly integrated chip containing
1707	  many ethernet hardware widgets for networking tasks. The processor
1708	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1709	  Full details can be found at http://www.caviumnetworks.com.
1710
1711config CPU_BMIPS
1712	bool "Broadcom BMIPS"
1713	depends on SYS_HAS_CPU_BMIPS
1714	select CPU_MIPS32
1715	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1716	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1717	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1718	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1719	select CPU_SUPPORTS_32BIT_KERNEL
1720	select DMA_NONCOHERENT
1721	select IRQ_MIPS_CPU
1722	select SWAP_IO_SPACE
1723	select WEAK_ORDERING
1724	select CPU_SUPPORTS_HIGHMEM
1725	select CPU_HAS_PREFETCH
1726	select CPU_SUPPORTS_CPUFREQ
1727	select MIPS_EXTERNAL_TIMER
1728	select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1729	help
1730	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1731
1732endchoice
1733
1734config CPU_MIPS32_3_5_FEATURES
1735	bool "MIPS32 Release 3.5 Features"
1736	depends on SYS_HAS_CPU_MIPS32_R3_5
1737	depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1738		   CPU_P5600
1739	help
1740	  Choose this option to build a kernel for release 2 or later of the
1741	  MIPS32 architecture including features from the 3.5 release such as
1742	  support for Enhanced Virtual Addressing (EVA).
1743
1744config CPU_MIPS32_3_5_EVA
1745	bool "Enhanced Virtual Addressing (EVA)"
1746	depends on CPU_MIPS32_3_5_FEATURES
1747	select EVA
1748	default y
1749	help
1750	  Choose this option if you want to enable the Enhanced Virtual
1751	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1752	  One of its primary benefits is an increase in the maximum size
1753	  of lowmem (up to 3GB). If unsure, say 'N' here.
1754
1755config CPU_MIPS32_R5_FEATURES
1756	bool "MIPS32 Release 5 Features"
1757	depends on SYS_HAS_CPU_MIPS32_R5
1758	depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1759	help
1760	  Choose this option to build a kernel for release 2 or later of the
1761	  MIPS32 architecture including features from release 5 such as
1762	  support for Extended Physical Addressing (XPA).
1763
1764config CPU_MIPS32_R5_XPA
1765	bool "Extended Physical Addressing (XPA)"
1766	depends on CPU_MIPS32_R5_FEATURES
1767	depends on !EVA
1768	depends on !PAGE_SIZE_4KB
1769	depends on SYS_SUPPORTS_HIGHMEM
1770	select XPA
1771	select HIGHMEM
1772	select PHYS_ADDR_T_64BIT
1773	default n
1774	help
1775	  Choose this option if you want to enable the Extended Physical
1776	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1777	  benefit is to increase physical addressing equal to or greater
1778	  than 40 bits. Note that this has the side effect of turning on
1779	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1780	  If unsure, say 'N' here.
1781
1782if CPU_LOONGSON2F
1783config CPU_NOP_WORKAROUNDS
1784	bool
1785
1786config CPU_JUMP_WORKAROUNDS
1787	bool
1788
1789config CPU_LOONGSON2F_WORKAROUNDS
1790	bool "Loongson 2F Workarounds"
1791	default y
1792	select CPU_NOP_WORKAROUNDS
1793	select CPU_JUMP_WORKAROUNDS
1794	help
1795	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1796	  require workarounds.  Without workarounds the system may hang
1797	  unexpectedly.  For more information please refer to the gas
1798	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1799
1800	  Loongson 2F03 and later have fixed these issues and no workarounds
1801	  are needed.  The workarounds have no significant side effect on them
1802	  but may decrease the performance of the system so this option should
1803	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1804	  systems.
1805
1806	  If unsure, please say Y.
1807endif # CPU_LOONGSON2F
1808
1809config SYS_SUPPORTS_ZBOOT
1810	bool
1811	select HAVE_KERNEL_GZIP
1812	select HAVE_KERNEL_BZIP2
1813	select HAVE_KERNEL_LZ4
1814	select HAVE_KERNEL_LZMA
1815	select HAVE_KERNEL_LZO
1816	select HAVE_KERNEL_XZ
1817	select HAVE_KERNEL_ZSTD
1818
1819config SYS_SUPPORTS_ZBOOT_UART16550
1820	bool
1821	select SYS_SUPPORTS_ZBOOT
1822
1823config SYS_SUPPORTS_ZBOOT_UART_PROM
1824	bool
1825	select SYS_SUPPORTS_ZBOOT
1826
1827config CPU_LOONGSON2EF
1828	bool
1829	select CPU_SUPPORTS_32BIT_KERNEL
1830	select CPU_SUPPORTS_64BIT_KERNEL
1831	select CPU_SUPPORTS_HIGHMEM
1832	select CPU_SUPPORTS_HUGEPAGES
1833	select ARCH_HAS_PHYS_TO_DMA
1834
1835config CPU_LOONGSON32
1836	bool
1837	select CPU_MIPS32
1838	select CPU_MIPSR2
1839	select CPU_HAS_PREFETCH
1840	select CPU_SUPPORTS_32BIT_KERNEL
1841	select CPU_SUPPORTS_HIGHMEM
1842	select CPU_SUPPORTS_CPUFREQ
1843
1844config CPU_BMIPS32_3300
1845	select SMP_UP if SMP
1846	bool
1847
1848config CPU_BMIPS4350
1849	bool
1850	select SYS_SUPPORTS_SMP
1851	select SYS_SUPPORTS_HOTPLUG_CPU
1852
1853config CPU_BMIPS4380
1854	bool
1855	select MIPS_L1_CACHE_SHIFT_6
1856	select SYS_SUPPORTS_SMP
1857	select SYS_SUPPORTS_HOTPLUG_CPU
1858	select CPU_HAS_RIXI
1859
1860config CPU_BMIPS5000
1861	bool
1862	select MIPS_CPU_SCACHE
1863	select MIPS_L1_CACHE_SHIFT_7
1864	select SYS_SUPPORTS_SMP
1865	select SYS_SUPPORTS_HOTPLUG_CPU
1866	select CPU_HAS_RIXI
1867
1868config SYS_HAS_CPU_LOONGSON64
1869	bool
1870	select CPU_SUPPORTS_CPUFREQ
1871	select CPU_HAS_RIXI
1872
1873config SYS_HAS_CPU_LOONGSON2E
1874	bool
1875
1876config SYS_HAS_CPU_LOONGSON2F
1877	bool
1878	select CPU_SUPPORTS_CPUFREQ
1879	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1880
1881config SYS_HAS_CPU_LOONGSON1B
1882	bool
1883
1884config SYS_HAS_CPU_LOONGSON1C
1885	bool
1886
1887config SYS_HAS_CPU_MIPS32_R1
1888	bool
1889
1890config SYS_HAS_CPU_MIPS32_R2
1891	bool
1892
1893config SYS_HAS_CPU_MIPS32_R3_5
1894	bool
1895
1896config SYS_HAS_CPU_MIPS32_R5
1897	bool
1898	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1899
1900config SYS_HAS_CPU_MIPS32_R6
1901	bool
1902	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1903
1904config SYS_HAS_CPU_MIPS64_R1
1905	bool
1906
1907config SYS_HAS_CPU_MIPS64_R2
1908	bool
1909
1910config SYS_HAS_CPU_MIPS64_R6
1911	bool
1912	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1913
1914config SYS_HAS_CPU_P5600
1915	bool
1916	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1917
1918config SYS_HAS_CPU_R3000
1919	bool
1920
1921config SYS_HAS_CPU_TX39XX
1922	bool
1923
1924config SYS_HAS_CPU_VR41XX
1925	bool
1926
1927config SYS_HAS_CPU_R4300
1928	bool
1929
1930config SYS_HAS_CPU_R4X00
1931	bool
1932
1933config SYS_HAS_CPU_TX49XX
1934	bool
1935
1936config SYS_HAS_CPU_R5000
1937	bool
1938
1939config SYS_HAS_CPU_R5500
1940	bool
1941
1942config SYS_HAS_CPU_NEVADA
1943	bool
1944
1945config SYS_HAS_CPU_R10000
1946	bool
1947	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1948
1949config SYS_HAS_CPU_RM7000
1950	bool
1951
1952config SYS_HAS_CPU_SB1
1953	bool
1954
1955config SYS_HAS_CPU_CAVIUM_OCTEON
1956	bool
1957
1958config SYS_HAS_CPU_BMIPS
1959	bool
1960
1961config SYS_HAS_CPU_BMIPS32_3300
1962	bool
1963	select SYS_HAS_CPU_BMIPS
1964
1965config SYS_HAS_CPU_BMIPS4350
1966	bool
1967	select SYS_HAS_CPU_BMIPS
1968
1969config SYS_HAS_CPU_BMIPS4380
1970	bool
1971	select SYS_HAS_CPU_BMIPS
1972
1973config SYS_HAS_CPU_BMIPS5000
1974	bool
1975	select SYS_HAS_CPU_BMIPS
1976	select ARCH_HAS_SYNC_DMA_FOR_CPU
1977
1978#
1979# CPU may reorder R->R, R->W, W->R, W->W
1980# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1981#
1982config WEAK_ORDERING
1983	bool
1984
1985#
1986# CPU may reorder reads and writes beyond LL/SC
1987# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1988#
1989config WEAK_REORDERING_BEYOND_LLSC
1990	bool
1991endmenu
1992
1993#
1994# These two indicate any level of the MIPS32 and MIPS64 architecture
1995#
1996config CPU_MIPS32
1997	bool
1998	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1999		     CPU_MIPS32_R6 || CPU_P5600
2000
2001config CPU_MIPS64
2002	bool
2003	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2004		     CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
2005
2006#
2007# These indicate the revision of the architecture
2008#
2009config CPU_MIPSR1
2010	bool
2011	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2012
2013config CPU_MIPSR2
2014	bool
2015	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2016	select CPU_HAS_RIXI
2017	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2018	select MIPS_SPRAM
2019
2020config CPU_MIPSR5
2021	bool
2022	default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2023	select CPU_HAS_RIXI
2024	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2025	select MIPS_SPRAM
2026
2027config CPU_MIPSR6
2028	bool
2029	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2030	select CPU_HAS_RIXI
2031	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2032	select HAVE_ARCH_BITREVERSE
2033	select MIPS_ASID_BITS_VARIABLE
2034	select MIPS_CRC_SUPPORT
2035	select MIPS_SPRAM
2036
2037config TARGET_ISA_REV
2038	int
2039	default 1 if CPU_MIPSR1
2040	default 2 if CPU_MIPSR2
2041	default 5 if CPU_MIPSR5
2042	default 6 if CPU_MIPSR6
2043	default 0
2044	help
2045	  Reflects the ISA revision being targeted by the kernel build. This
2046	  is effectively the Kconfig equivalent of MIPS_ISA_REV.
2047
2048config EVA
2049	bool
2050
2051config XPA
2052	bool
2053
2054config SYS_SUPPORTS_32BIT_KERNEL
2055	bool
2056config SYS_SUPPORTS_64BIT_KERNEL
2057	bool
2058config CPU_SUPPORTS_32BIT_KERNEL
2059	bool
2060config CPU_SUPPORTS_64BIT_KERNEL
2061	bool
2062config CPU_SUPPORTS_CPUFREQ
2063	bool
2064config CPU_SUPPORTS_ADDRWINCFG
2065	bool
2066config CPU_SUPPORTS_HUGEPAGES
2067	bool
2068	depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2069config MIPS_PGD_C0_CONTEXT
2070	bool
2071	depends on 64BIT
2072	default y if (CPU_MIPSR2 || CPU_MIPSR6)
2073
2074#
2075# Set to y for ptrace access to watch registers.
2076#
2077config HARDWARE_WATCHPOINTS
2078	bool
2079	default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2080
2081menu "Kernel type"
2082
2083choice
2084	prompt "Kernel code model"
2085	help
2086	  You should only select this option if you have a workload that
2087	  actually benefits from 64-bit processing or if your machine has
2088	  large memory.  You will only be presented a single option in this
2089	  menu if your system does not support both 32-bit and 64-bit kernels.
2090
2091config 32BIT
2092	bool "32-bit kernel"
2093	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2094	select TRAD_SIGNALS
2095	help
2096	  Select this option if you want to build a 32-bit kernel.
2097
2098config 64BIT
2099	bool "64-bit kernel"
2100	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2101	help
2102	  Select this option if you want to build a 64-bit kernel.
2103
2104endchoice
2105
2106config MIPS_VA_BITS_48
2107	bool "48 bits virtual memory"
2108	depends on 64BIT
2109	help
2110	  Support a maximum at least 48 bits of application virtual
2111	  memory.  Default is 40 bits or less, depending on the CPU.
2112	  For page sizes 16k and above, this option results in a small
2113	  memory overhead for page tables.  For 4k page size, a fourth
2114	  level of page tables is added which imposes both a memory
2115	  overhead as well as slower TLB fault handling.
2116
2117	  If unsure, say N.
2118
2119choice
2120	prompt "Kernel page size"
2121	default PAGE_SIZE_4KB
2122
2123config PAGE_SIZE_4KB
2124	bool "4kB"
2125	depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2126	help
2127	  This option select the standard 4kB Linux page size.  On some
2128	  R3000-family processors this is the only available page size.  Using
2129	  4kB page size will minimize memory consumption and is therefore
2130	  recommended for low memory systems.
2131
2132config PAGE_SIZE_8KB
2133	bool "8kB"
2134	depends on CPU_CAVIUM_OCTEON
2135	depends on !MIPS_VA_BITS_48
2136	help
2137	  Using 8kB page size will result in higher performance kernel at
2138	  the price of higher memory consumption.  This option is available
2139	  only on cnMIPS processors.  Note that you will need a suitable Linux
2140	  distribution to support this.
2141
2142config PAGE_SIZE_16KB
2143	bool "16kB"
2144	depends on !CPU_R3000 && !CPU_TX39XX
2145	help
2146	  Using 16kB page size will result in higher performance kernel at
2147	  the price of higher memory consumption.  This option is available on
2148	  all non-R3000 family processors.  Note that you will need a suitable
2149	  Linux distribution to support this.
2150
2151config PAGE_SIZE_32KB
2152	bool "32kB"
2153	depends on CPU_CAVIUM_OCTEON
2154	depends on !MIPS_VA_BITS_48
2155	help
2156	  Using 32kB page size will result in higher performance kernel at
2157	  the price of higher memory consumption.  This option is available
2158	  only on cnMIPS cores.  Note that you will need a suitable Linux
2159	  distribution to support this.
2160
2161config PAGE_SIZE_64KB
2162	bool "64kB"
2163	depends on !CPU_R3000 && !CPU_TX39XX
2164	help
2165	  Using 64kB page size will result in higher performance kernel at
2166	  the price of higher memory consumption.  This option is available on
2167	  all non-R3000 family processor.  Not that at the time of this
2168	  writing this option is still high experimental.
2169
2170endchoice
2171
2172config FORCE_MAX_ZONEORDER
2173	int "Maximum zone order"
2174	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2175	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2176	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2177	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2178	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2179	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2180	range 0 64
2181	default "11"
2182	help
2183	  The kernel memory allocator divides physically contiguous memory
2184	  blocks into "zones", where each zone is a power of two number of
2185	  pages.  This option selects the largest power of two that the kernel
2186	  keeps in the memory allocator.  If you need to allocate very large
2187	  blocks of physically contiguous memory, then you may need to
2188	  increase this value.
2189
2190	  This config option is actually maximum order plus one. For example,
2191	  a value of 11 means that the largest free memory block is 2^10 pages.
2192
2193	  The page size is not necessarily 4KB.  Keep this in mind
2194	  when choosing a value for this option.
2195
2196config BOARD_SCACHE
2197	bool
2198
2199config IP22_CPU_SCACHE
2200	bool
2201	select BOARD_SCACHE
2202
2203#
2204# Support for a MIPS32 / MIPS64 style S-caches
2205#
2206config MIPS_CPU_SCACHE
2207	bool
2208	select BOARD_SCACHE
2209
2210config R5000_CPU_SCACHE
2211	bool
2212	select BOARD_SCACHE
2213
2214config RM7000_CPU_SCACHE
2215	bool
2216	select BOARD_SCACHE
2217
2218config SIBYTE_DMA_PAGEOPS
2219	bool "Use DMA to clear/copy pages"
2220	depends on CPU_SB1
2221	help
2222	  Instead of using the CPU to zero and copy pages, use a Data Mover
2223	  channel.  These DMA channels are otherwise unused by the standard
2224	  SiByte Linux port.  Seems to give a small performance benefit.
2225
2226config CPU_HAS_PREFETCH
2227	bool
2228
2229config CPU_GENERIC_DUMP_TLB
2230	bool
2231	default y if !(CPU_R3000 || CPU_TX39XX)
2232
2233config MIPS_FP_SUPPORT
2234	bool "Floating Point support" if EXPERT
2235	default y
2236	help
2237	  Select y to include support for floating point in the kernel
2238	  including initialization of FPU hardware, FP context save & restore
2239	  and emulation of an FPU where necessary. Without this support any
2240	  userland program attempting to use floating point instructions will
2241	  receive a SIGILL.
2242
2243	  If you know that your userland will not attempt to use floating point
2244	  instructions then you can say n here to shrink the kernel a little.
2245
2246	  If unsure, say y.
2247
2248config CPU_R2300_FPU
2249	bool
2250	depends on MIPS_FP_SUPPORT
2251	default y if CPU_R3000 || CPU_TX39XX
2252
2253config CPU_R3K_TLB
2254	bool
2255
2256config CPU_R4K_FPU
2257	bool
2258	depends on MIPS_FP_SUPPORT
2259	default y if !CPU_R2300_FPU
2260
2261config CPU_R4K_CACHE_TLB
2262	bool
2263	default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2264
2265config MIPS_MT_SMP
2266	bool "MIPS MT SMP support (1 TC on each available VPE)"
2267	default y
2268	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2269	select CPU_MIPSR2_IRQ_VI
2270	select CPU_MIPSR2_IRQ_EI
2271	select SYNC_R4K
2272	select MIPS_MT
2273	select SMP
2274	select SMP_UP
2275	select SYS_SUPPORTS_SMP
2276	select SYS_SUPPORTS_SCHED_SMT
2277	select MIPS_PERF_SHARED_TC_COUNTERS
2278	help
2279	  This is a kernel model which is known as SMVP. This is supported
2280	  on cores with the MT ASE and uses the available VPEs to implement
2281	  virtual processors which supports SMP. This is equivalent to the
2282	  Intel Hyperthreading feature. For further information go to
2283	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
2284
2285config MIPS_MT
2286	bool
2287
2288config SCHED_SMT
2289	bool "SMT (multithreading) scheduler support"
2290	depends on SYS_SUPPORTS_SCHED_SMT
2291	default n
2292	help
2293	  SMT scheduler support improves the CPU scheduler's decision making
2294	  when dealing with MIPS MT enabled cores at a cost of slightly
2295	  increased overhead in some places. If unsure say N here.
2296
2297config SYS_SUPPORTS_SCHED_SMT
2298	bool
2299
2300config SYS_SUPPORTS_MULTITHREADING
2301	bool
2302
2303config MIPS_MT_FPAFF
2304	bool "Dynamic FPU affinity for FP-intensive threads"
2305	default y
2306	depends on MIPS_MT_SMP
2307
2308config MIPSR2_TO_R6_EMULATOR
2309	bool "MIPS R2-to-R6 emulator"
2310	depends on CPU_MIPSR6
2311	depends on MIPS_FP_SUPPORT
2312	default y
2313	help
2314	  Choose this option if you want to run non-R6 MIPS userland code.
2315	  Even if you say 'Y' here, the emulator will still be disabled by
2316	  default. You can enable it using the 'mipsr2emu' kernel option.
2317	  The only reason this is a build-time option is to save ~14K from the
2318	  final kernel image.
2319
2320config SYS_SUPPORTS_VPE_LOADER
2321	bool
2322	depends on SYS_SUPPORTS_MULTITHREADING
2323	help
2324	  Indicates that the platform supports the VPE loader, and provides
2325	  physical_memsize.
2326
2327config MIPS_VPE_LOADER
2328	bool "VPE loader support."
2329	depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2330	select CPU_MIPSR2_IRQ_VI
2331	select CPU_MIPSR2_IRQ_EI
2332	select MIPS_MT
2333	help
2334	  Includes a loader for loading an elf relocatable object
2335	  onto another VPE and running it.
2336
2337config MIPS_VPE_LOADER_CMP
2338	bool
2339	default "y"
2340	depends on MIPS_VPE_LOADER && MIPS_CMP
2341
2342config MIPS_VPE_LOADER_MT
2343	bool
2344	default "y"
2345	depends on MIPS_VPE_LOADER && !MIPS_CMP
2346
2347config MIPS_VPE_LOADER_TOM
2348	bool "Load VPE program into memory hidden from linux"
2349	depends on MIPS_VPE_LOADER
2350	default y
2351	help
2352	  The loader can use memory that is present but has been hidden from
2353	  Linux using the kernel command line option "mem=xxMB". It's up to
2354	  you to ensure the amount you put in the option and the space your
2355	  program requires is less or equal to the amount physically present.
2356
2357config MIPS_VPE_APSP_API
2358	bool "Enable support for AP/SP API (RTLX)"
2359	depends on MIPS_VPE_LOADER
2360
2361config MIPS_VPE_APSP_API_CMP
2362	bool
2363	default "y"
2364	depends on MIPS_VPE_APSP_API && MIPS_CMP
2365
2366config MIPS_VPE_APSP_API_MT
2367	bool
2368	default "y"
2369	depends on MIPS_VPE_APSP_API && !MIPS_CMP
2370
2371config MIPS_CMP
2372	bool "MIPS CMP framework support (DEPRECATED)"
2373	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2374	select SMP
2375	select SYNC_R4K
2376	select SYS_SUPPORTS_SMP
2377	select WEAK_ORDERING
2378	default n
2379	help
2380	  Select this if you are using a bootloader which implements the "CMP
2381	  framework" protocol (ie. YAMON) and want your kernel to make use of
2382	  its ability to start secondary CPUs.
2383
2384	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
2385	  instead of this.
2386
2387config MIPS_CPS
2388	bool "MIPS Coherent Processing System support"
2389	depends on SYS_SUPPORTS_MIPS_CPS
2390	select MIPS_CM
2391	select MIPS_CPS_PM if HOTPLUG_CPU
2392	select SMP
2393	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2394	select SYS_SUPPORTS_HOTPLUG_CPU
2395	select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2396	select SYS_SUPPORTS_SMP
2397	select WEAK_ORDERING
2398	select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2399	help
2400	  Select this if you wish to run an SMP kernel across multiple cores
2401	  within a MIPS Coherent Processing System. When this option is
2402	  enabled the kernel will probe for other cores and boot them with
2403	  no external assistance. It is safe to enable this when hardware
2404	  support is unavailable.
2405
2406config MIPS_CPS_PM
2407	depends on MIPS_CPS
2408	bool
2409
2410config MIPS_CM
2411	bool
2412	select MIPS_CPC
2413
2414config MIPS_CPC
2415	bool
2416
2417config SB1_PASS_2_WORKAROUNDS
2418	bool
2419	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2420	default y
2421
2422config SB1_PASS_2_1_WORKAROUNDS
2423	bool
2424	depends on CPU_SB1 && CPU_SB1_PASS_2
2425	default y
2426
2427choice
2428	prompt "SmartMIPS or microMIPS ASE support"
2429
2430config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2431	bool "None"
2432	help
2433	  Select this if you want neither microMIPS nor SmartMIPS support
2434
2435config CPU_HAS_SMARTMIPS
2436	depends on SYS_SUPPORTS_SMARTMIPS
2437	bool "SmartMIPS"
2438	help
2439	  SmartMIPS is a extension of the MIPS32 architecture aimed at
2440	  increased security at both hardware and software level for
2441	  smartcards.  Enabling this option will allow proper use of the
2442	  SmartMIPS instructions by Linux applications.  However a kernel with
2443	  this option will not work on a MIPS core without SmartMIPS core.  If
2444	  you don't know you probably don't have SmartMIPS and should say N
2445	  here.
2446
2447config CPU_MICROMIPS
2448	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2449	bool "microMIPS"
2450	help
2451	  When this option is enabled the kernel will be built using the
2452	  microMIPS ISA
2453
2454endchoice
2455
2456config CPU_HAS_MSA
2457	bool "Support for the MIPS SIMD Architecture"
2458	depends on CPU_SUPPORTS_MSA
2459	depends on MIPS_FP_SUPPORT
2460	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2461	help
2462	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2463	  and a set of SIMD instructions to operate on them. When this option
2464	  is enabled the kernel will support allocating & switching MSA
2465	  vector register contexts. If you know that your kernel will only be
2466	  running on CPUs which do not support MSA or that your userland will
2467	  not be making use of it then you may wish to say N here to reduce
2468	  the size & complexity of your kernel.
2469
2470	  If unsure, say Y.
2471
2472config CPU_HAS_WB
2473	bool
2474
2475config XKS01
2476	bool
2477
2478config CPU_HAS_DIEI
2479	depends on !CPU_DIEI_BROKEN
2480	bool
2481
2482config CPU_DIEI_BROKEN
2483	bool
2484
2485config CPU_HAS_RIXI
2486	bool
2487
2488config CPU_NO_LOAD_STORE_LR
2489	bool
2490	help
2491	  CPU lacks support for unaligned load and store instructions:
2492	  LWL, LWR, SWL, SWR (Load/store word left/right).
2493	  LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2494	  systems).
2495
2496#
2497# Vectored interrupt mode is an R2 feature
2498#
2499config CPU_MIPSR2_IRQ_VI
2500	bool
2501
2502#
2503# Extended interrupt mode is an R2 feature
2504#
2505config CPU_MIPSR2_IRQ_EI
2506	bool
2507
2508config CPU_HAS_SYNC
2509	bool
2510	depends on !CPU_R3000
2511	default y
2512
2513#
2514# CPU non-features
2515#
2516config CPU_DADDI_WORKAROUNDS
2517	bool
2518
2519config CPU_R4000_WORKAROUNDS
2520	bool
2521	select CPU_R4400_WORKAROUNDS
2522
2523config CPU_R4400_WORKAROUNDS
2524	bool
2525
2526config CPU_R4X00_BUGS64
2527	bool
2528	default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2529
2530config MIPS_ASID_SHIFT
2531	int
2532	default 6 if CPU_R3000 || CPU_TX39XX
2533	default 0
2534
2535config MIPS_ASID_BITS
2536	int
2537	default 0 if MIPS_ASID_BITS_VARIABLE
2538	default 6 if CPU_R3000 || CPU_TX39XX
2539	default 8
2540
2541config MIPS_ASID_BITS_VARIABLE
2542	bool
2543
2544config MIPS_CRC_SUPPORT
2545	bool
2546
2547# R4600 erratum.  Due to the lack of errata information the exact
2548# technical details aren't known.  I've experimentally found that disabling
2549# interrupts during indexed I-cache flushes seems to be sufficient to deal
2550# with the issue.
2551config WAR_R4600_V1_INDEX_ICACHEOP
2552	bool
2553
2554# Pleasures of the R4600 V1.x.  Cite from the IDT R4600 V1.7 errata:
2555#
2556#  18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2557#      Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2558#      executed if there is no other dcache activity. If the dcache is
2559#      accessed for another instruction immediately preceding when these
2560#      cache instructions are executing, it is possible that the dcache
2561#      tag match outputs used by these cache instructions will be
2562#      incorrect. These cache instructions should be preceded by at least
2563#      four instructions that are not any kind of load or store
2564#      instruction.
2565#
2566#      This is not allowed:    lw
2567#                              nop
2568#                              nop
2569#                              nop
2570#                              cache       Hit_Writeback_Invalidate_D
2571#
2572#      This is allowed:        lw
2573#                              nop
2574#                              nop
2575#                              nop
2576#                              nop
2577#                              cache       Hit_Writeback_Invalidate_D
2578config WAR_R4600_V1_HIT_CACHEOP
2579	bool
2580
2581# Writeback and invalidate the primary cache dcache before DMA.
2582#
2583# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2584# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2585# operate correctly if the internal data cache refill buffer is empty.  These
2586# CACHE instructions should be separated from any potential data cache miss
2587# by a load instruction to an uncached address to empty the response buffer."
2588# (Revision 2.0 device errata from IDT available on https://www.idt.com/
2589# in .pdf format.)
2590config WAR_R4600_V2_HIT_CACHEOP
2591	bool
2592
2593# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2594# the line which this instruction itself exists, the following
2595# operation is not guaranteed."
2596#
2597# Workaround: do two phase flushing for Index_Invalidate_I
2598config WAR_TX49XX_ICACHE_INDEX_INV
2599	bool
2600
2601# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2602# opposes it being called that) where invalid instructions in the same
2603# I-cache line worth of instructions being fetched may case spurious
2604# exceptions.
2605config WAR_ICACHE_REFILLS
2606	bool
2607
2608# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2609# may cause ll / sc and lld / scd sequences to execute non-atomically.
2610config WAR_R10000_LLSC
2611	bool
2612
2613# 34K core erratum: "Problems Executing the TLBR Instruction"
2614config WAR_MIPS34K_MISSED_ITLB
2615	bool
2616
2617#
2618# - Highmem only makes sense for the 32-bit kernel.
2619# - The current highmem code will only work properly on physically indexed
2620#   caches such as R3000, SB1, R7000 or those that look like they're virtually
2621#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
2622#   moment we protect the user and offer the highmem option only on machines
2623#   where it's known to be safe.  This will not offer highmem on a few systems
2624#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2625#   indexed CPUs but we're playing safe.
2626# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2627#   know they might have memory configurations that could make use of highmem
2628#   support.
2629#
2630config HIGHMEM
2631	bool "High Memory Support"
2632	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2633	select KMAP_LOCAL
2634
2635config CPU_SUPPORTS_HIGHMEM
2636	bool
2637
2638config SYS_SUPPORTS_HIGHMEM
2639	bool
2640
2641config SYS_SUPPORTS_SMARTMIPS
2642	bool
2643
2644config SYS_SUPPORTS_MICROMIPS
2645	bool
2646
2647config SYS_SUPPORTS_MIPS16
2648	bool
2649	help
2650	  This option must be set if a kernel might be executed on a MIPS16-
2651	  enabled CPU even if MIPS16 is not actually being used.  In other
2652	  words, it makes the kernel MIPS16-tolerant.
2653
2654config CPU_SUPPORTS_MSA
2655	bool
2656
2657config ARCH_FLATMEM_ENABLE
2658	def_bool y
2659	depends on !NUMA && !CPU_LOONGSON2EF
2660
2661config ARCH_SPARSEMEM_ENABLE
2662	bool
2663	select SPARSEMEM_STATIC if !SGI_IP27
2664
2665config NUMA
2666	bool "NUMA Support"
2667	depends on SYS_SUPPORTS_NUMA
2668	select SMP
2669	help
2670	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2671	  Access).  This option improves performance on systems with more
2672	  than two nodes; on two node systems it is generally better to
2673	  leave it disabled; on single node systems leave this option
2674	  disabled.
2675
2676config SYS_SUPPORTS_NUMA
2677	bool
2678
2679config HAVE_SETUP_PER_CPU_AREA
2680	def_bool y
2681	depends on NUMA
2682
2683config NEED_PER_CPU_EMBED_FIRST_CHUNK
2684	def_bool y
2685	depends on NUMA
2686
2687config RELOCATABLE
2688	bool "Relocatable kernel"
2689	depends on SYS_SUPPORTS_RELOCATABLE
2690	depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2691		   CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2692		   CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2693		   CPU_P5600 || CAVIUM_OCTEON_SOC || \
2694		   CPU_LOONGSON64
2695	help
2696	  This builds a kernel image that retains relocation information
2697	  so it can be loaded someplace besides the default 1MB.
2698	  The relocations make the kernel binary about 15% larger,
2699	  but are discarded at runtime
2700
2701config RELOCATION_TABLE_SIZE
2702	hex "Relocation table size"
2703	depends on RELOCATABLE
2704	range 0x0 0x01000000
2705	default "0x00200000" if CPU_LOONGSON64
2706	default "0x00100000"
2707	help
2708	  A table of relocation data will be appended to the kernel binary
2709	  and parsed at boot to fix up the relocated kernel.
2710
2711	  This option allows the amount of space reserved for the table to be
2712	  adjusted, although the default of 1Mb should be ok in most cases.
2713
2714	  The build will fail and a valid size suggested if this is too small.
2715
2716	  If unsure, leave at the default value.
2717
2718config RANDOMIZE_BASE
2719	bool "Randomize the address of the kernel image"
2720	depends on RELOCATABLE
2721	help
2722	  Randomizes the physical and virtual address at which the
2723	  kernel image is loaded, as a security feature that
2724	  deters exploit attempts relying on knowledge of the location
2725	  of kernel internals.
2726
2727	  Entropy is generated using any coprocessor 0 registers available.
2728
2729	  The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2730
2731	  If unsure, say N.
2732
2733config RANDOMIZE_BASE_MAX_OFFSET
2734	hex "Maximum kASLR offset" if EXPERT
2735	depends on RANDOMIZE_BASE
2736	range 0x0 0x40000000 if EVA || 64BIT
2737	range 0x0 0x08000000
2738	default "0x01000000"
2739	help
2740	  When kASLR is active, this provides the maximum offset that will
2741	  be applied to the kernel image. It should be set according to the
2742	  amount of physical RAM available in the target system minus
2743	  PHYSICAL_START and must be a power of 2.
2744
2745	  This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2746	  EVA or 64-bit. The default is 16Mb.
2747
2748config NODES_SHIFT
2749	int
2750	default "6"
2751	depends on NUMA
2752
2753config HW_PERF_EVENTS
2754	bool "Enable hardware performance counter support for perf events"
2755	depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2756	default y
2757	help
2758	  Enable hardware performance counter support for perf events. If
2759	  disabled, perf events will use software events only.
2760
2761config DMI
2762	bool "Enable DMI scanning"
2763	depends on MACH_LOONGSON64
2764	select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2765	default y
2766	help
2767	  Enabled scanning of DMI to identify machine quirks. Say Y
2768	  here unless you have verified that your setup is not
2769	  affected by entries in the DMI blacklist. Required by PNP
2770	  BIOS code.
2771
2772config SMP
2773	bool "Multi-Processing support"
2774	depends on SYS_SUPPORTS_SMP
2775	help
2776	  This enables support for systems with more than one CPU. If you have
2777	  a system with only one CPU, say N. If you have a system with more
2778	  than one CPU, say Y.
2779
2780	  If you say N here, the kernel will run on uni- and multiprocessor
2781	  machines, but will use only one CPU of a multiprocessor machine. If
2782	  you say Y here, the kernel will run on many, but not all,
2783	  uniprocessor machines. On a uniprocessor machine, the kernel
2784	  will run faster if you say N here.
2785
2786	  People using multiprocessor machines who say Y here should also say
2787	  Y to "Enhanced Real Time Clock Support", below.
2788
2789	  See also the SMP-HOWTO available at
2790	  <https://www.tldp.org/docs.html#howto>.
2791
2792	  If you don't know what to do here, say N.
2793
2794config HOTPLUG_CPU
2795	bool "Support for hot-pluggable CPUs"
2796	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2797	help
2798	  Say Y here to allow turning CPUs off and on. CPUs can be
2799	  controlled through /sys/devices/system/cpu.
2800	  (Note: power management support will enable this option
2801	    automatically on SMP systems. )
2802	  Say N if you want to disable CPU hotplug.
2803
2804config SMP_UP
2805	bool
2806
2807config SYS_SUPPORTS_MIPS_CMP
2808	bool
2809
2810config SYS_SUPPORTS_MIPS_CPS
2811	bool
2812
2813config SYS_SUPPORTS_SMP
2814	bool
2815
2816config NR_CPUS_DEFAULT_4
2817	bool
2818
2819config NR_CPUS_DEFAULT_8
2820	bool
2821
2822config NR_CPUS_DEFAULT_16
2823	bool
2824
2825config NR_CPUS_DEFAULT_32
2826	bool
2827
2828config NR_CPUS_DEFAULT_64
2829	bool
2830
2831config NR_CPUS
2832	int "Maximum number of CPUs (2-256)"
2833	range 2 256
2834	depends on SMP
2835	default "4" if NR_CPUS_DEFAULT_4
2836	default "8" if NR_CPUS_DEFAULT_8
2837	default "16" if NR_CPUS_DEFAULT_16
2838	default "32" if NR_CPUS_DEFAULT_32
2839	default "64" if NR_CPUS_DEFAULT_64
2840	help
2841	  This allows you to specify the maximum number of CPUs which this
2842	  kernel will support.  The maximum supported value is 32 for 32-bit
2843	  kernel and 64 for 64-bit kernels; the minimum value which makes
2844	  sense is 1 for Qemu (useful only for kernel debugging purposes)
2845	  and 2 for all others.
2846
2847	  This is purely to save memory - each supported CPU adds
2848	  approximately eight kilobytes to the kernel image.  For best
2849	  performance should round up your number of processors to the next
2850	  power of two.
2851
2852config MIPS_PERF_SHARED_TC_COUNTERS
2853	bool
2854
2855config MIPS_NR_CPU_NR_MAP_1024
2856	bool
2857
2858config MIPS_NR_CPU_NR_MAP
2859	int
2860	depends on SMP
2861	default 1024 if MIPS_NR_CPU_NR_MAP_1024
2862	default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2863
2864#
2865# Timer Interrupt Frequency Configuration
2866#
2867
2868choice
2869	prompt "Timer frequency"
2870	default HZ_250
2871	help
2872	  Allows the configuration of the timer frequency.
2873
2874	config HZ_24
2875		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2876
2877	config HZ_48
2878		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2879
2880	config HZ_100
2881		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2882
2883	config HZ_128
2884		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2885
2886	config HZ_250
2887		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2888
2889	config HZ_256
2890		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2891
2892	config HZ_1000
2893		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2894
2895	config HZ_1024
2896		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2897
2898endchoice
2899
2900config SYS_SUPPORTS_24HZ
2901	bool
2902
2903config SYS_SUPPORTS_48HZ
2904	bool
2905
2906config SYS_SUPPORTS_100HZ
2907	bool
2908
2909config SYS_SUPPORTS_128HZ
2910	bool
2911
2912config SYS_SUPPORTS_250HZ
2913	bool
2914
2915config SYS_SUPPORTS_256HZ
2916	bool
2917
2918config SYS_SUPPORTS_1000HZ
2919	bool
2920
2921config SYS_SUPPORTS_1024HZ
2922	bool
2923
2924config SYS_SUPPORTS_ARBIT_HZ
2925	bool
2926	default y if !SYS_SUPPORTS_24HZ && \
2927		     !SYS_SUPPORTS_48HZ && \
2928		     !SYS_SUPPORTS_100HZ && \
2929		     !SYS_SUPPORTS_128HZ && \
2930		     !SYS_SUPPORTS_250HZ && \
2931		     !SYS_SUPPORTS_256HZ && \
2932		     !SYS_SUPPORTS_1000HZ && \
2933		     !SYS_SUPPORTS_1024HZ
2934
2935config HZ
2936	int
2937	default 24 if HZ_24
2938	default 48 if HZ_48
2939	default 100 if HZ_100
2940	default 128 if HZ_128
2941	default 250 if HZ_250
2942	default 256 if HZ_256
2943	default 1000 if HZ_1000
2944	default 1024 if HZ_1024
2945
2946config SCHED_HRTICK
2947	def_bool HIGH_RES_TIMERS
2948
2949config KEXEC
2950	bool "Kexec system call"
2951	select KEXEC_CORE
2952	help
2953	  kexec is a system call that implements the ability to shutdown your
2954	  current kernel, and to start another kernel.  It is like a reboot
2955	  but it is independent of the system firmware.   And like a reboot
2956	  you can start any kernel with it, not just Linux.
2957
2958	  The name comes from the similarity to the exec system call.
2959
2960	  It is an ongoing process to be certain the hardware in a machine
2961	  is properly shutdown, so do not be surprised if this code does not
2962	  initially work for you.  As of this writing the exact hardware
2963	  interface is strongly in flux, so no good recommendation can be
2964	  made.
2965
2966config CRASH_DUMP
2967	bool "Kernel crash dumps"
2968	help
2969	  Generate crash dump after being started by kexec.
2970	  This should be normally only set in special crash dump kernels
2971	  which are loaded in the main kernel with kexec-tools into
2972	  a specially reserved region and then later executed after
2973	  a crash by kdump/kexec. The crash dump kernel must be compiled
2974	  to a memory address not used by the main kernel or firmware using
2975	  PHYSICAL_START.
2976
2977config PHYSICAL_START
2978	hex "Physical address where the kernel is loaded"
2979	default "0xffffffff84000000"
2980	depends on CRASH_DUMP
2981	help
2982	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2983	  If you plan to use kernel for capturing the crash dump change
2984	  this value to start of the reserved region (the "X" value as
2985	  specified in the "crashkernel=YM@XM" command line boot parameter
2986	  passed to the panic-ed kernel).
2987
2988config MIPS_O32_FP64_SUPPORT
2989	bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2990	depends on 32BIT || MIPS32_O32
2991	help
2992	  When this is enabled, the kernel will support use of 64-bit floating
2993	  point registers with binaries using the O32 ABI along with the
2994	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2995	  32-bit MIPS systems this support is at the cost of increasing the
2996	  size and complexity of the compiled FPU emulator. Thus if you are
2997	  running a MIPS32 system and know that none of your userland binaries
2998	  will require 64-bit floating point, you may wish to reduce the size
2999	  of your kernel & potentially improve FP emulation performance by
3000	  saying N here.
3001
3002	  Although binutils currently supports use of this flag the details
3003	  concerning its effect upon the O32 ABI in userland are still being
3004	  worked on. In order to avoid userland becoming dependent upon current
3005	  behaviour before the details have been finalised, this option should
3006	  be considered experimental and only enabled by those working upon
3007	  said details.
3008
3009	  If unsure, say N.
3010
3011config USE_OF
3012	bool
3013	select OF
3014	select OF_EARLY_FLATTREE
3015	select IRQ_DOMAIN
3016
3017config UHI_BOOT
3018	bool
3019
3020config BUILTIN_DTB
3021	bool
3022
3023choice
3024	prompt "Kernel appended dtb support" if USE_OF
3025	default MIPS_NO_APPENDED_DTB
3026
3027	config MIPS_NO_APPENDED_DTB
3028		bool "None"
3029		help
3030		  Do not enable appended dtb support.
3031
3032	config MIPS_ELF_APPENDED_DTB
3033		bool "vmlinux"
3034		help
3035		  With this option, the boot code will look for a device tree binary
3036		  DTB) included in the vmlinux ELF section .appended_dtb. By default
3037		  it is empty and the DTB can be appended using binutils command
3038		  objcopy:
3039
3040		    objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3041
3042		  This is meant as a backward compatibility convenience for those
3043		  systems with a bootloader that can't be upgraded to accommodate
3044		  the documented boot protocol using a device tree.
3045
3046	config MIPS_RAW_APPENDED_DTB
3047		bool "vmlinux.bin or vmlinuz.bin"
3048		help
3049		  With this option, the boot code will look for a device tree binary
3050		  DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3051		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3052
3053		  This is meant as a backward compatibility convenience for those
3054		  systems with a bootloader that can't be upgraded to accommodate
3055		  the documented boot protocol using a device tree.
3056
3057		  Beware that there is very little in terms of protection against
3058		  this option being confused by leftover garbage in memory that might
3059		  look like a DTB header after a reboot if no actual DTB is appended
3060		  to vmlinux.bin.  Do not leave this option active in a production kernel
3061		  if you don't intend to always append a DTB.
3062endchoice
3063
3064choice
3065	prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3066	default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3067					 !MACH_LOONGSON64 && !MIPS_MALTA && \
3068					 !CAVIUM_OCTEON_SOC
3069	default MIPS_CMDLINE_FROM_BOOTLOADER
3070
3071	config MIPS_CMDLINE_FROM_DTB
3072		depends on USE_OF
3073		bool "Dtb kernel arguments if available"
3074
3075	config MIPS_CMDLINE_DTB_EXTEND
3076		depends on USE_OF
3077		bool "Extend dtb kernel arguments with bootloader arguments"
3078
3079	config MIPS_CMDLINE_FROM_BOOTLOADER
3080		bool "Bootloader kernel arguments if available"
3081
3082	config MIPS_CMDLINE_BUILTIN_EXTEND
3083		depends on CMDLINE_BOOL
3084		bool "Extend builtin kernel arguments with bootloader arguments"
3085endchoice
3086
3087endmenu
3088
3089config LOCKDEP_SUPPORT
3090	bool
3091	default y
3092
3093config STACKTRACE_SUPPORT
3094	bool
3095	default y
3096
3097config PGTABLE_LEVELS
3098	int
3099	default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3100	default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3101	default 2
3102
3103config MIPS_AUTO_PFN_OFFSET
3104	bool
3105
3106menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3107
3108config PCI_DRIVERS_GENERIC
3109	select PCI_DOMAINS_GENERIC if PCI
3110	bool
3111
3112config PCI_DRIVERS_LEGACY
3113	def_bool !PCI_DRIVERS_GENERIC
3114	select NO_GENERIC_PCI_IOPORT_MAP
3115	select PCI_DOMAINS if PCI
3116
3117#
3118# ISA support is now enabled via select.  Too many systems still have the one
3119# or other ISA chip on the board that users don't know about so don't expect
3120# users to choose the right thing ...
3121#
3122config ISA
3123	bool
3124
3125config TC
3126	bool "TURBOchannel support"
3127	depends on MACH_DECSTATION
3128	help
3129	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3130	  processors.  TURBOchannel programming specifications are available
3131	  at:
3132	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3133	  and:
3134	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3135	  Linux driver support status is documented at:
3136	  <http://www.linux-mips.org/wiki/DECstation>
3137
3138config MMU
3139	bool
3140	default y
3141
3142config ARCH_MMAP_RND_BITS_MIN
3143	default 12 if 64BIT
3144	default 8
3145
3146config ARCH_MMAP_RND_BITS_MAX
3147	default 18 if 64BIT
3148	default 15
3149
3150config ARCH_MMAP_RND_COMPAT_BITS_MIN
3151	default 8
3152
3153config ARCH_MMAP_RND_COMPAT_BITS_MAX
3154	default 15
3155
3156config I8253
3157	bool
3158	select CLKSRC_I8253
3159	select CLKEVT_I8253
3160	select MIPS_EXTERNAL_TIMER
3161endmenu
3162
3163config TRAD_SIGNALS
3164	bool
3165
3166config MIPS32_COMPAT
3167	bool
3168
3169config COMPAT
3170	bool
3171
3172config SYSVIPC_COMPAT
3173	bool
3174
3175config MIPS32_O32
3176	bool "Kernel support for o32 binaries"
3177	depends on 64BIT
3178	select ARCH_WANT_OLD_COMPAT_IPC
3179	select COMPAT
3180	select MIPS32_COMPAT
3181	select SYSVIPC_COMPAT if SYSVIPC
3182	help
3183	  Select this option if you want to run o32 binaries.  These are pure
3184	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
3185	  existing binaries are in this format.
3186
3187	  If unsure, say Y.
3188
3189config MIPS32_N32
3190	bool "Kernel support for n32 binaries"
3191	depends on 64BIT
3192	select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3193	select COMPAT
3194	select MIPS32_COMPAT
3195	select SYSVIPC_COMPAT if SYSVIPC
3196	help
3197	  Select this option if you want to run n32 binaries.  These are
3198	  64-bit binaries using 32-bit quantities for addressing and certain
3199	  data that would normally be 64-bit.  They are used in special
3200	  cases.
3201
3202	  If unsure, say N.
3203
3204menu "Power management options"
3205
3206config ARCH_HIBERNATION_POSSIBLE
3207	def_bool y
3208	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3209
3210config ARCH_SUSPEND_POSSIBLE
3211	def_bool y
3212	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3213
3214source "kernel/power/Kconfig"
3215
3216endmenu
3217
3218config MIPS_EXTERNAL_TIMER
3219	bool
3220
3221menu "CPU Power Management"
3222
3223if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3224source "drivers/cpufreq/Kconfig"
3225endif
3226
3227source "drivers/cpuidle/Kconfig"
3228
3229endmenu
3230
3231source "arch/mips/kvm/Kconfig"
3232
3233source "arch/mips/vdso/Kconfig"
3234