1menu "HID setup" 2 3menu "HID0 initial" 4 5config HID0_INIT_EMCP 6 bool "Enable machine check int on mcp" 7 8config HID0_INIT_ECPE 9 bool "Enable cache parity errors" 10 11config HID0_INIT_EBA 12 bool "Enable address parity checking" 13 14config HID0_INIT_EBD 15 bool "Enable data parity checking" 16 17choice 18 prompt "HID0 clock configuration" 19 20config HID0_INIT_CLKOUT_OFF 21 bool "Clock output off" 22 23config HID0_INIT_CLKOUT_CORE_HALF 24 bool "Core clock / 2" 25 26config HID0_INIT_CLKOUT_CORE 27 bool "Core clock" 28 29config HID0_INIT_CLKOUT_BUS 30 bool "Bus clock" 31 32endchoice 33 34config HID0_INIT_PAR 35 bool "Disable precharge of artry_out" 36 37config HID0_INIT_DOZE 38 bool "Enable doze mode" 39 40config HID0_INIT_NAP 41 bool "Enable nap mode" 42 43config HID0_INIT_SLEEP 44 bool "Enable sleep mode" 45 46config HID0_INIT_DPM 47 bool "Enable dynamic power management" 48 49config HID0_INIT_ICE 50 bool "Enable instruction cache" 51 52config HID0_INIT_DCE 53 bool "Enable data cache" 54 55config HID0_INIT_ILOCK 56 bool "Lock instruction cache" 57 58config HID0_INIT_DLOCK 59 bool "Lock data cache" 60 61config HID0_INIT_ICFI 62 bool "Flash invalidate instruction cache" 63 64config HID0_INIT_DCFI 65 bool "Flash invalidate data cache" 66 67config HID0_INIT_IFEM 68 bool "Enable m bit on bus for instruction fetches" 69 70config HID0_INIT_DECAREN 71 bool "Decrementer auto reload" 72 73config HID0_INIT_FBIOB 74 bool "Force indirect branch on the bus" 75 76config HID0_INIT_ABE 77 bool "Enable address broadcast" 78 79config HID0_INIT_NOOPTI 80 bool "No-op data cache touch intructions" 81 82endmenu 83 84menu "HID0 final" 85 86config HID0_FINAL_EMCP 87 bool "Enable machine check int on mcp" 88 89config HID0_FINAL_ECPE 90 bool "Enable cache parity errors" 91 92config HID0_FINAL_EBA 93 bool "Enable address parity checking" 94 95config HID0_FINAL_EBD 96 bool "Enable data parity checking" 97 98choice 99 prompt "HID0 clock configuration" 100 101config HID0_FINAL_CLKOUT_OFF 102 bool "Clock output off" 103 104config HID0_FINAL_CLKOUT_CORE_HALF 105 bool "Core clock / 2" 106 107config HID0_FINAL_CLKOUT_CORE 108 bool "Core clock" 109 110config HID0_FINAL_CLKOUT_BUS 111 bool "Bus clock" 112 113endchoice 114 115config HID0_FINAL_PAR 116 bool "Disable precharge of artry_out" 117 118config HID0_FINAL_DOZE 119 bool "Enable doze mode" 120 121config HID0_FINAL_NAP 122 bool "Enable nap mode" 123 124config HID0_FINAL_SLEEP 125 bool "Enable sleep mode" 126 127config HID0_FINAL_DPM 128 bool "Enable dynamic power management" 129 130config HID0_FINAL_ICE 131 bool "Enable instruction cache" 132 133config HID0_FINAL_DCE 134 bool "Enable data cache" 135 136config HID0_FINAL_ILOCK 137 bool "Lock instruction cache" 138 139config HID0_FINAL_DLOCK 140 bool "Lock data cache" 141 142config HID0_FINAL_ICFI 143 bool "Flash invalidate instruction cache" 144 145config HID0_FINAL_DCFI 146 bool "Flash invalidate data cache" 147 148config HID0_FINAL_IFEM 149 bool "Enable m bit on bus for instruction fetches" 150 151config HID0_FINAL_DECAREN 152 bool "Decrementer auto reload" 153 154config HID0_FINAL_FBIOB 155 bool "Force indirect branch on the bus" 156 157config HID0_FINAL_ABE 158 bool "Enable address broadcast" 159 160config HID0_FINAL_NOOPTI 161 bool "No-op data cache touch intructions" 162 163endmenu 164 165config HID0_INIT_EMCP_BIT 166 hex 167 default 0x0 if !HID0_INIT_EMCP 168 default 0x80000000 if HID0_INIT_EMCP 169 170config HID0_INIT_ECPE_BIT 171 hex 172 default 0x0 if !HID0_INIT_ECPE 173 default 0x40000000 if HID0_INIT_ECPE 174 175config HID0_INIT_EBA_BIT 176 hex 177 default 0x0 if !HID0_INIT_EBA 178 default 0x20000000 if HID0_INIT_EBA 179 180config HID0_INIT_EBD_BIT 181 hex 182 default 0x0 if !HID0_INIT_EBD 183 default 0x10000000 if HID0_INIT_EBD 184 185config HID0_INIT_CLKOUT 186 hex 187 default 0x0 if HID0_INIT_CLKOUT_OFF 188 default 0x8000000 if HID0_INIT_CLKOUT_CORE_HALF 189 default 0x2000000 if HID0_INIT_CLKOUT_CORE 190 default 0xa000000 if HID0_INIT_CLKOUT_BUS 191 192config HID0_INIT_PAR_BIT 193 hex 194 default 0x0 if !HID0_INIT_PAR 195 default 0x1000000 if HID0_INIT_PAR 196 197config HID0_INIT_DOZE_BIT 198 hex 199 default 0x0 if !HID0_INIT_DOZE 200 default 0x800000 if HID0_INIT_DOZE 201 202config HID0_INIT_NAP_BIT 203 hex 204 default 0x0 if !HID0_INIT_NAP 205 default 0x400000 if HID0_INIT_NAP 206 207config HID0_INIT_SLEEP_BIT 208 hex 209 default 0x0 if !HID0_INIT_SLEEP 210 default 0x200000 if HID0_INIT_SLEEP 211 212config HID0_INIT_DPM_BIT 213 hex 214 default 0x0 if !HID0_INIT_DPM 215 default 0x100000 if HID0_INIT_DPM 216 217config HID0_INIT_ICE_BIT 218 hex 219 default 0x0 if !HID0_INIT_ICE 220 default 0x8000 if HID0_INIT_ICE 221 222config HID0_INIT_DCE_BIT 223 hex 224 default 0x0 if !HID0_INIT_DCE 225 default 0x4000 if HID0_INIT_DCE 226 227config HID0_INIT_ILOCK_BIT 228 hex 229 default 0x0 if !HID0_INIT_ILOCK 230 default 0x2000 if HID0_INIT_ILOCK 231 232config HID0_INIT_DLOCK_BIT 233 hex 234 default 0x0 if !HID0_INIT_DLOCK 235 default 0x1000 if HID0_INIT_DLOCK 236 237config HID0_INIT_ICFI_BIT 238 hex 239 default 0x0 if !HID0_INIT_ICFI 240 default 0x800 if HID0_INIT_ICFI 241 242config HID0_INIT_DCFI_BIT 243 hex 244 default 0x0 if !HID0_INIT_DCFI 245 default 0x400 if HID0_INIT_DCFI 246 247config HID0_INIT_IFEM_BIT 248 hex 249 default 0x0 if !HID0_INIT_IFEM 250 default 0x80 if HID0_INIT_IFEM 251 252config HID0_INIT_DECAREN_BIT 253 hex 254 default 0x0 if !HID0_INIT_DECAREN 255 default 0x40 if HID0_INIT_DECAREN 256 257config HID0_INIT_FBIOB_BIT 258 hex 259 default 0x0 if !HID0_INIT_FBIOB 260 default 0x10 if HID0_INIT_FBIOB 261 262config HID0_INIT_ABE_BIT 263 hex 264 default 0x0 if !HID0_INIT_ABE 265 default 0x8 if HID0_INIT_ABE 266 267config HID0_INIT_NOOPTI_BIT 268 hex 269 default 0x0 if !HID0_INIT_NOOPTI 270 default 0x1 if HID0_INIT_NOOPTI 271 272config HID0_FINAL_EMCP_BIT 273 hex 274 default 0x0 if !HID0_FINAL_EMCP 275 default 0x80000000 if HID0_FINAL_EMCP 276 277config HID0_FINAL_ECPE_BIT 278 hex 279 default 0x0 if !HID0_FINAL_ECPE 280 default 0x40000000 if HID0_FINAL_ECPE 281 282config HID0_FINAL_EBA_BIT 283 hex 284 default 0x0 if !HID0_FINAL_EBA 285 default 0x20000000 if HID0_FINAL_EBA 286 287config HID0_FINAL_EBD_BIT 288 hex 289 default 0x0 if !HID0_FINAL_EBD 290 default 0x10000000 if HID0_FINAL_EBD 291 292config HID0_FINAL_CLKOUT 293 hex 294 default 0x0 if HID0_FINAL_CLKOUT_OFF 295 default 0x8000000 if HID0_FINAL_CLKOUT_CORE_HALF 296 default 0x2000000 if HID0_FINAL_CLKOUT_CORE 297 default 0xa000000 if HID0_FINAL_CLKOUT_BUS 298 299config HID0_FINAL_SBCLK_BIT 300 hex 301 default 0x0 if !HID0_FINAL_SBCLK 302 default 0x8000000 if HID0_FINAL_SBCLK 303 304config HID0_FINAL_ECLK_BIT 305 hex 306 default 0x0 if !HID0_FINAL_ECLK 307 default 0x2000000 if HID0_FINAL_ECLK 308 309config HID0_FINAL_PAR_BIT 310 hex 311 default 0x0 if !HID0_FINAL_PAR 312 default 0x1000000 if HID0_FINAL_PAR 313 314config HID0_FINAL_DOZE_BIT 315 hex 316 default 0x0 if !HID0_FINAL_DOZE 317 default 0x800000 if HID0_FINAL_DOZE 318 319config HID0_FINAL_NAP_BIT 320 hex 321 default 0x0 if !HID0_FINAL_NAP 322 default 0x400000 if HID0_FINAL_NAP 323 324config HID0_FINAL_SLEEP_BIT 325 hex 326 default 0x0 if !HID0_FINAL_SLEEP 327 default 0x200000 if HID0_FINAL_SLEEP 328 329config HID0_FINAL_DPM_BIT 330 hex 331 default 0x0 if !HID0_FINAL_DPM 332 default 0x100000 if HID0_FINAL_DPM 333 334config HID0_FINAL_ICE_BIT 335 hex 336 default 0x0 if !HID0_FINAL_ICE 337 default 0x8000 if HID0_FINAL_ICE 338 339config HID0_FINAL_DCE_BIT 340 hex 341 default 0x0 if !HID0_FINAL_DCE 342 default 0x4000 if HID0_FINAL_DCE 343 344config HID0_FINAL_ILOCK_BIT 345 hex 346 default 0x0 if !HID0_FINAL_ILOCK 347 default 0x2000 if HID0_FINAL_ILOCK 348 349config HID0_FINAL_DLOCK_BIT 350 hex 351 default 0x0 if !HID0_FINAL_DLOCK 352 default 0x1000 if HID0_FINAL_DLOCK 353 354config HID0_FINAL_ICFI_BIT 355 hex 356 default 0x0 if !HID0_FINAL_ICFI 357 default 0x800 if HID0_FINAL_ICFI 358 359config HID0_FINAL_DCFI_BIT 360 hex 361 default 0x0 if !HID0_FINAL_DCFI 362 default 0x400 if HID0_FINAL_DCFI 363 364config HID0_FINAL_IFEM_BIT 365 hex 366 default 0x0 if !HID0_FINAL_IFEM 367 default 0x80 if HID0_FINAL_IFEM 368 369config HID0_FINAL_DECAREN_BIT 370 hex 371 default 0x0 if !HID0_FINAL_DECAREN 372 default 0x40 if HID0_FINAL_DECAREN 373 374config HID0_FINAL_FBIOB_BIT 375 hex 376 default 0x0 if !HID0_FINAL_FBIOB 377 default 0x10 if HID0_FINAL_FBIOB 378 379config HID0_FINAL_ABE_BIT 380 hex 381 default 0x0 if !HID0_FINAL_ABE 382 default 0x8 if HID0_FINAL_ABE 383 384config HID0_FINAL_NOOPTI_BIT 385 hex 386 default 0x0 if !HID0_FINAL_NOOPTI 387 default 0x1 if HID0_FINAL_NOOPTI 388 389menu "HID2" 390 391config HID2_LET 392 bool "True little-endian mode" 393 394config HID2_IFEB 395 bool "Instruction fetch burst extension" 396 397config HID2_MESISTATE 398 bool "MESI state enable" 399 400config HID2_IFEC 401 bool "Instruction fetch cancel extension" 402 403config HID2_EBQS 404 bool "BIU queue sharing" 405 406config HID2_EBPX 407 bool "BIU pipeline extension" 408 409if !ARCH_MPC8360 410 411config HID2_ELRW 412 bool "Weighted LRU" 413 414config HID2_NOKS 415 bool "No kill for snoop" 416 417endif 418 419config HID2_HBE 420 bool "High bat enable" 421 422choice 423 prompt "Instruction cache way-lock" 424 425config HID2_IWLCK_NONE 426 bool "No ways locked" 427 428config HID2_IWLCK_0 429 bool "Way 0 locked" 430 431config HID2_IWLCK_1 432 bool "Way 0 through 1 locked" 433 434config HID2_IWLCK_2 435 bool "Way 0 through 2 locked" 436 437if ARCH_MPC8349 || ARCH_MPC8360 || ARCH_MPC8379 438 439config HID2_IWLCK_3 440 bool "Way 0 through 3 locked" 441 442config HID2_IWLCK_4 443 bool "Way 0 through 4 locked" 444 445config HID2_IWLCK_5 446 bool "Way 0 through 5 locked" 447 448config HID2_IWLCK_6 449 bool "Way 0 through 6 locked" 450 451endif 452 453endchoice 454 455config HID2_ICWP 456 bool "Instruction cache way protection" 457 458choice 459 prompt "Data cache way-lock" 460 461config HID2_DWLCK_NONE 462 bool "No ways locked" 463 464config HID2_DWLCK_0 465 bool "Way 0 locked" 466 467config HID2_DWLCK_1 468 bool "Way 0 through 1 locked" 469 470config HID2_DWLCK_2 471 bool "Way 0 through 2 locked" 472 473if ARCH_MPC8349 || ARCH_MPC8360 || ARCH_MPC8379 474 475config HID2_DWLCK_3 476 bool "Way 0 through 3 locked" 477 478config HID2_DWLCK_4 479 bool "Way 0 through 4 locked" 480 481config HID2_DWLCK_5 482 bool "Way 0 through 5 locked" 483 484config HID2_DWLCK_6 485 bool "Way 0 through 6 locked" 486 487endif 488 489endchoice 490 491config HID2_LET_BIT 492 hex 493 default 0x0 if !HID2_LET 494 default 0x8000000 if HID2_LET 495 496config HID2_IFEB_BIT 497 hex 498 default 0x0 if !HID2_IFEB 499 default 0x4000000 if HID2_IFEB 500 501config HID2_MESISTATE_BIT 502 hex 503 default 0x0 if !HID2_MESISTATE 504 default 0x1000000 if HID2_MESISTATE 505 506config HID2_IFEC_BIT 507 hex 508 default 0x0 if !HID2_IFEC 509 default 0x800000 if HID2_IFEC 510 511config HID2_EBQS_BIT 512 hex 513 default 0x0 if !HID2_EBQS 514 default 0x400000 if HID2_EBQS 515 516config HID2_EBPX_BIT 517 hex 518 default 0x0 if !HID2_EBPX 519 default 0x200000 if HID2_EBPX 520 521config HID2_ELRW_BIT 522 hex 523 default 0x0 if !HID2_ELRW 524 default 0x100000 if HID2_ELRW 525 526config HID2_NOKS_BIT 527 hex 528 default 0x0 if !HID2_NOKS 529 default 0x80000 if HID2_NOKS 530 531config HID2_HBE_BIT 532 hex 533 default 0x0 if !HID2_HBE 534 default 0x40000 if HID2_HBE 535 536config HID2_IWLCK 537 hex 538 default 0x0 if HID2_IWLCK_NONE 539 default 0x2000 if HID2_IWLCK_0 540 default 0x4000 if HID2_IWLCK_1 541 default 0x6000 if HID2_IWLCK_2 542 default 0x8000 if HID2_IWLCK_3 543 default 0xA000 if HID2_IWLCK_4 544 default 0xC000 if HID2_IWLCK_5 545 default 0xE000 if HID2_IWLCK_6 546 547config HID2_ICWP_BIT 548 hex 549 default 0x0 if !HID2_ICWP 550 default 0x1000 if HID2_ICWP 551 552config HID2_DWLCK 553 hex 554 default 0x0 if HID2_DWLCK_NONE 555 default 0x20 if HID2_DWLCK_0 556 default 0x40 if HID2_DWLCK_1 557 default 0x60 if HID2_DWLCK_2 558 default 0x80 if HID2_DWLCK_3 559 default 0xA0 if HID2_DWLCK_4 560 default 0xC0 if HID2_DWLCK_5 561 default 0xE0 if HID2_DWLCK_6 562 563endmenu 564 565endmenu 566