1# SPDX-License-Identifier: GPL-2.0
2menu "Platform support"
3
4source "arch/powerpc/platforms/powernv/Kconfig"
5source "arch/powerpc/platforms/pseries/Kconfig"
6source "arch/powerpc/platforms/chrp/Kconfig"
7source "arch/powerpc/platforms/512x/Kconfig"
8source "arch/powerpc/platforms/52xx/Kconfig"
9source "arch/powerpc/platforms/powermac/Kconfig"
10source "arch/powerpc/platforms/maple/Kconfig"
11source "arch/powerpc/platforms/pasemi/Kconfig"
12source "arch/powerpc/platforms/ps3/Kconfig"
13source "arch/powerpc/platforms/cell/Kconfig"
14source "arch/powerpc/platforms/8xx/Kconfig"
15source "arch/powerpc/platforms/82xx/Kconfig"
16source "arch/powerpc/platforms/83xx/Kconfig"
17source "arch/powerpc/platforms/85xx/Kconfig"
18source "arch/powerpc/platforms/86xx/Kconfig"
19source "arch/powerpc/platforms/embedded6xx/Kconfig"
20source "arch/powerpc/platforms/44x/Kconfig"
21source "arch/powerpc/platforms/40x/Kconfig"
22source "arch/powerpc/platforms/amigaone/Kconfig"
23source "arch/powerpc/platforms/book3s/Kconfig"
24source "arch/powerpc/platforms/microwatt/Kconfig"
25
26config KVM_GUEST
27	bool "KVM Guest support"
28	select EPAPR_PARAVIRT
29	help
30	  This option enables various optimizations for running under the KVM
31	  hypervisor. Overhead for the kernel when not running inside KVM should
32	  be minimal.
33
34	  In case of doubt, say Y
35
36config EPAPR_PARAVIRT
37	bool "ePAPR para-virtualization support"
38	help
39	  Enables ePAPR para-virtualization support for guests.
40
41	  In case of doubt, say Y
42
43config PPC_NATIVE
44	bool
45	depends on PPC_BOOK3S_32 || PPC64
46	help
47	  Support for running natively on the hardware, i.e. without
48	  a hypervisor. This option is not user-selectable but should
49	  be selected by all platforms that need it.
50
51config PPC_OF_BOOT_TRAMPOLINE
52	bool "Support booting from Open Firmware or yaboot"
53	depends on PPC_BOOK3S_32 || PPC64
54	select RELOCATABLE if PPC64
55	default y
56	help
57	  Support from booting from Open Firmware or yaboot using an
58	  Open Firmware client interface. This enables the kernel to
59	  communicate with open firmware to retrieve system information
60	  such as the device tree.
61
62	  In case of doubt, say Y
63
64config PPC_DT_CPU_FTRS
65	bool "Device-tree based CPU feature discovery & setup"
66	depends on PPC_BOOK3S_64
67	default y
68	help
69	  This enables code to use a new device tree binding for describing CPU
70	  compatibility and features. Saying Y here will attempt to use the new
71	  binding if the firmware provides it. Currently only the skiboot
72	  firmware provides this binding.
73	  If you're not sure say Y.
74
75config UDBG_RTAS_CONSOLE
76	bool "RTAS based debug console"
77	depends on PPC_RTAS
78
79config PPC_SMP_MUXED_IPI
80	bool
81	help
82	  Select this option if your platform supports SMP and your
83	  interrupt controller provides less than 4 interrupts to each
84	  cpu.	This will enable the generic code to multiplex the 4
85	  messages on to one ipi.
86
87config IPIC
88	bool
89
90config MPIC
91	bool
92
93config MPIC_TIMER
94	bool "MPIC Global Timer"
95	depends on MPIC && FSL_SOC
96	help
97	  The MPIC global timer is a hardware timer inside the
98	  Freescale PIC complying with OpenPIC standard. When the
99	  specified interval times out, the hardware timer generates
100	  an interrupt. The driver currently is only tested on fsl
101	  chip, but it can potentially support other global timers
102	  complying with the OpenPIC standard.
103
104config FSL_MPIC_TIMER_WAKEUP
105	tristate "Freescale MPIC global timer wakeup driver"
106	depends on FSL_SOC &&  MPIC_TIMER && PM
107	help
108	  The driver provides a way to wake up the system by MPIC
109	  timer.
110	  e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup"
111
112config PPC_EPAPR_HV_PIC
113	bool
114	select EPAPR_PARAVIRT
115
116config MPIC_WEIRD
117	bool
118
119config MPIC_MSGR
120	bool "MPIC message register support"
121	depends on MPIC
122	help
123	  Enables support for the MPIC message registers.  These
124	  registers are used for inter-processor communication.
125
126config PPC_I8259
127	bool
128
129config U3_DART
130	bool
131	depends on PPC64
132
133config PPC_RTAS
134	bool
135
136config RTAS_ERROR_LOGGING
137	bool
138	depends on PPC_RTAS
139
140config PPC_RTAS_DAEMON
141	bool
142	depends on PPC_RTAS
143
144config RTAS_PROC
145	bool "Proc interface to RTAS"
146	depends on PPC_RTAS && PROC_FS
147	default y
148
149config RTAS_FLASH
150	tristate "Firmware flash interface"
151	depends on PPC64 && RTAS_PROC
152
153config MMIO_NVRAM
154	bool
155
156config MPIC_U3_HT_IRQS
157	bool
158
159config MPIC_BROKEN_REGREAD
160	bool
161	depends on MPIC
162	help
163	  This option enables a MPIC driver workaround for some chips
164	  that have a bug that causes some interrupt source information
165	  to not read back properly. It is safe to use on other chips as
166	  well, but enabling it uses about 8KB of memory to keep copies
167	  of the register contents in software.
168
169config EEH
170	bool
171	depends on (PPC_POWERNV || PPC_PSERIES) && PCI
172	default y
173
174config PPC_MPC106
175	bool
176
177config PPC_970_NAP
178	bool
179
180config PPC_P7_NAP
181	bool
182
183config PPC_BOOK3S_IDLE
184	def_bool y
185	depends on (PPC_970_NAP || PPC_P7_NAP)
186
187config PPC_INDIRECT_PIO
188	bool
189	select GENERIC_IOMAP
190
191config PPC_INDIRECT_MMIO
192	bool
193
194config PPC_IO_WORKAROUNDS
195	bool
196
197source "drivers/cpufreq/Kconfig"
198
199menu "CPUIdle driver"
200
201source "drivers/cpuidle/Kconfig"
202
203endmenu
204
205config TAU
206	bool "On-chip CPU temperature sensor support"
207	depends on PPC_BOOK3S_32
208	help
209	  G3 and G4 processors have an on-chip temperature sensor called the
210	  'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
211	  temperature within 2-4 degrees Celsius. This option shows the current
212	  on-die temperature in /proc/cpuinfo if the cpu supports it.
213
214	  Unfortunately, this sensor is very inaccurate when uncalibrated, so
215	  don't assume the cpu temp is actually what /proc/cpuinfo says it is.
216
217config TAU_INT
218	bool "Interrupt driven TAU driver (EXPERIMENTAL)"
219	depends on TAU
220	help
221	  The TAU supports an interrupt driven mode which causes an interrupt
222	  whenever the temperature goes out of range. This is the fastest way
223	  to get notified the temp has exceeded a range. With this option off,
224	  a timer is used to re-check the temperature periodically.
225
226	  If in doubt, say N here.
227
228config TAU_AVERAGE
229	bool "Average high and low temp"
230	depends on TAU
231	help
232	  The TAU hardware can compare the temperature to an upper and lower
233	  bound.  The default behavior is to show both the upper and lower
234	  bound in /proc/cpuinfo. If the range is large, the temperature is
235	  either changing a lot, or the TAU hardware is broken (likely on some
236	  G4's). If the range is small (around 4 degrees), the temperature is
237	  relatively stable.  If you say Y here, a single temperature value,
238	  halfway between the upper and lower bounds, will be reported in
239	  /proc/cpuinfo.
240
241	  If in doubt, say N here.
242
243config QE_GPIO
244	bool "QE GPIO support"
245	depends on QUICC_ENGINE
246	select GPIOLIB
247	help
248	  Say Y here if you're going to use hardware that connects to the
249	  QE GPIOs.
250
251config CPM2
252	bool "Enable support for the CPM2 (Communications Processor Module)"
253	depends on (FSL_SOC_BOOKE && PPC32) || 8260
254	select CPM
255	select HAVE_PCI
256	select GPIOLIB
257	help
258	  The CPM2 (Communications Processor Module) is a coprocessor on
259	  embedded CPUs made by Freescale.  Selecting this option means that
260	  you wish to build a kernel for a machine with a CPM2 coprocessor
261	  on it (826x, 827x, 8560).
262
263config FSL_ULI1575
264	bool
265	select GENERIC_ISA_DMA
266	help
267	  Supports for the ULI1575 PCIe south bridge that exists on some
268	  Freescale reference boards. The boards all use the ULI in pretty
269	  much the same way.
270
271config CPM
272	bool
273	select GENERIC_ALLOCATOR
274
275config OF_RTC
276	bool
277	help
278	  Uses information from the OF or flattened device tree to instantiate
279	  platform devices for direct mapped RTC chips like the DS1742 or DS1743.
280
281config GEN_RTC
282	bool "Use the platform RTC operations from user space"
283	select RTC_CLASS
284	select RTC_DRV_GENERIC
285	help
286	  This option provides backwards compatibility with the old gen_rtc.ko
287	  module that was traditionally used for old PowerPC machines.
288	  Platforms should migrate to enabling the RTC_DRV_GENERIC by hand
289	  replacing their get_rtc_time/set_rtc_time callbacks with
290	  a proper RTC device driver.
291
292config MCU_MPC8349EMITX
293	bool "MPC8349E-mITX MCU driver"
294	depends on I2C=y && PPC_83xx
295	select GPIOLIB
296	help
297	  Say Y here to enable soft power-off functionality on the Freescale
298	  boards with the MPC8349E-mITX-compatible MCU chips. This driver will
299	  also register MCU GPIOs with the generic GPIO API, so you'll able
300	  to use MCU pins as GPIOs.
301
302endmenu
303